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3da02409af
As reported in the community forum [0][1], QEMU processes for Linux
guests would consume more CPU on the host after an update to QEMU 9.2.
The issue was reproduced and bisecting pointed to QEMU commit
f0ccf77078 ("hpet: fix and cleanup persistence of interrupt status").
Some quick experimentation suggests that in particular the last part
is responsible for the issue:
> - the timer must be kept running even if not enabled, in
> order to set the ISR flag, so writes to HPET_TN_CFG must
> not call hpet_del_timer()
Users confirmed that setting the hpet=off machine flag works around
the issue[0]. For Windows (7 or later) guests, the flag is already
disabled, because of issues in the past [2].
Upstream suggested reverting the relevant patches for now [3], because
other issues were reported too. All except commit 5895879aca ("hpet:
remove unnecessary variable "index"") are actually dependent on each
other for cleanly reverting f0ccf77078, and while not strictly
required, that one was reverted too for completeness.
[0]: https://forum.proxmox.com/threads/163694/
[1]: https://forum.proxmox.com/threads/161849/post-756793
[2]: https://lists.proxmox.com/pipermail/pve-devel/2012-December/004958.html
[3]: https://lore.kernel.org/qemu-devel/CABgObfaKJ5NFVKmYLFmu4C0iZZLJJtcWksLCzyA0tBoz0koZ4A@mail.gmail.com/
Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
65 lines
2.6 KiB
Diff
65 lines
2.6 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Fiona Ebner <f.ebner@proxmox.com>
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Date: Wed, 19 Mar 2025 17:31:10 +0100
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Subject: [PATCH] Revert "hpet: place read-only bits directly in "new_val""
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This reverts commit ba88935b0fac2588b0a739f810b58dfabf7f92c8.
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Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
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---
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hw/timer/hpet.c | 15 ++++++++-------
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1 file changed, 8 insertions(+), 7 deletions(-)
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diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
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index e1ac877759..b12bbaf10d 100644
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--- a/hw/timer/hpet.c
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+++ b/hw/timer/hpet.c
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@@ -510,7 +510,7 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
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{
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int i;
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HPETState *s = opaque;
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- uint64_t old_val, new_val, cleared;
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+ uint64_t old_val, new_val, val;
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trace_hpet_ram_write(addr, value);
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old_val = hpet_ram_read(opaque, addr, 4);
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@@ -536,12 +536,13 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
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*/
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update_irq(timer, 0);
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}
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- new_val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK);
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- timer->config = (timer->config & 0xffffffff00000000ULL) | new_val;
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+ val = hpet_fixup_reg(new_val, old_val, HPET_TN_CFG_WRITE_MASK);
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+ timer->config = (timer->config & 0xffffffff00000000ULL) | val;
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if (activating_bit(old_val, new_val, HPET_TN_ENABLE)
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&& (s->isr & (1 << timer_id))) {
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update_irq(timer, 1);
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}
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+
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if (new_val & HPET_TN_32BIT) {
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timer->cmp = (uint32_t)timer->cmp;
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timer->period = (uint32_t)timer->period;
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@@ -622,8 +623,8 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
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case HPET_ID:
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return;
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case HPET_CFG:
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- new_val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK);
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- s->config = (s->config & 0xffffffff00000000ULL) | new_val;
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+ val = hpet_fixup_reg(new_val, old_val, HPET_CFG_WRITE_MASK);
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+ s->config = (s->config & 0xffffffff00000000ULL) | val;
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if (activating_bit(old_val, new_val, HPET_CFG_ENABLE)) {
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/* Enable main counter and interrupt generation. */
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s->hpet_offset =
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@@ -657,9 +658,9 @@ static void hpet_ram_write(void *opaque, hwaddr addr,
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trace_hpet_invalid_hpet_cfg(4);
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break;
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case HPET_STATUS:
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- cleared = new_val & s->isr;
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+ val = new_val & s->isr;
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for (i = 0; i < s->num_timers; i++) {
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- if (cleared & (1 << i)) {
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+ if (val & (1 << i)) {
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update_irq(&s->timer[i], 0);
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}
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}
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