pve-qemu/debian/patches/pve/0021-PVE-Config-Revert-target-i386-disable-LINT0-after-re.patch
Fiona Ebner 670aa8ecdf update submodule and patches to QEMU 9.2.0
Notable changes:

* Commit 07bea2d35f ("block-backend: Remove deadcode") removed
  blk_op_{,un}block_all() which was used by PVE async savevm code.
  Fixed by switching to using bdrv_op_{,un}block_all().

* Drop patches that are already part of upstream.

Signed-off-by: Fiona Ebner <f.ebner@proxmox.com>
2025-02-04 08:37:47 +01:00

33 lines
1.0 KiB
Diff

From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Wolfgang Bumiller <w.bumiller@proxmox.com>
Date: Mon, 6 Apr 2020 12:16:49 +0200
Subject: [PATCH] PVE: [Config] Revert "target-i386: disable LINT0 after reset"
This reverts commit b8eb5512fd8a115f164edbbe897cdf8884920ccb.
Signed-off-by: Thomas Lamprecht <t.lamprecht@proxmox.com>
---
hw/intc/apic_common.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 62f3bbf203..89e0c7d995 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -263,6 +263,15 @@ static void apic_reset_common(DeviceState *dev)
info->vapic_base_update(s);
apic_init_reset(dev);
+
+ if (bsp) {
+ /*
+ * LINT0 delivery mode on CPU #0 is set to ExtInt at initialization
+ * time typically by BIOS, so PIC interrupt can be delivered to the
+ * processor when local APIC is enabled.
+ */
+ s->lvt[APIC_LVT_LINT0] = 0x700;
+ }
}
static const VMStateDescription vmstate_apic_common;