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037e4f2536
The .align directive used to align storage locations is ambiguous. On some platforms and assemblers it takes a byte count, on others the argument is interpreted as a shift value. The current usage expects the first interpretation. Replace it with the unambiguous .balign directive which always expects a byte count, regardless of platform and assembler. Reviewed-by: Jorgen Lundman <lundman@lundman.net> Reviewed-by: Tino Reichardt <milky-zfs@mcmilk.de> Reviewed-by: Richard Yao <richard.yao@alumni.stonybrook.edu> Signed-off-by: Attila Fülöp <attila@fueloep.org> Closes #14422
166 lines
3.3 KiB
ArmAsm
166 lines
3.3 KiB
ArmAsm
/* $FreeBSD$ */
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/* from: NetBSD: setjmp.S,v 1.1 1998/01/27 15:13:12 sakamoto Exp $ */
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/* from: OpenBSD: setjmp.S,v 1.2 1996/12/28 06:22:18 rahnds Exp */
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/* kernel version of this file, does not have signal goop */
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/* int setjmp(jmp_buf env) */
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#define _ASM
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#include <asm/types.h>
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#ifdef __powerpc64__
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#if !defined(PPC64_ELF_ABI_v2) && !defined(PPC64_ELF_ABI_v1)
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#if defined(_CALL_ELF) && _CALL_ELF == 2
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#define PPC64_ELF_ABI_v2
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#endif /* _CALL_ELF */
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#endif /* PPC64_ELF_ABI_ */
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#endif /* __powerpc64__ */
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#ifdef __powerpc64__
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#define LD_REG ld
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#define ST_REG std
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#define REGWIDTH 8
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#else
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#define LD_REG lwz
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#define ST_REG stw
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#define REGWIDTH 4
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#endif /* __powerpc64__ */
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#define JMP_r1 1*REGWIDTH
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#define JMP_r2 2*REGWIDTH
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#define JMP_r14 3*REGWIDTH
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#define JMP_r15 4*REGWIDTH
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#define JMP_r16 5*REGWIDTH
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#define JMP_r17 6*REGWIDTH
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#define JMP_r18 7*REGWIDTH
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#define JMP_r19 8*REGWIDTH
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#define JMP_r20 9*REGWIDTH
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#define JMP_r21 10*REGWIDTH
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#define JMP_r22 11*REGWIDTH
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#define JMP_r23 12*REGWIDTH
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#define JMP_r24 13*REGWIDTH
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#define JMP_r25 14*REGWIDTH
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#define JMP_r26 15*REGWIDTH
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#define JMP_r27 16*REGWIDTH
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#define JMP_r28 17*REGWIDTH
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#define JMP_r29 18*REGWIDTH
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#define JMP_r30 19*REGWIDTH
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#define JMP_r31 20*REGWIDTH
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#define JMP_lr 21*REGWIDTH
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#define JMP_cr 22*REGWIDTH
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#define JMP_ctr 23*REGWIDTH
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#define JMP_xer 24*REGWIDTH
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#ifdef __powerpc64__
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#ifdef PPC64_ELF_ABI_v2
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#define ENTRY(name) \
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.balign 2 ; \
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.type name,@function; \
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.weak name; \
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name:
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#else /* PPC64_ELF_ABI_v1 */
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#define XGLUE(a,b) a##b
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#define GLUE(a,b) XGLUE(a,b)
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#define ENTRY(name) \
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.balign 2 ; \
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.weak name; \
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.weak GLUE(.,name); \
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.pushsection ".opd","aw"; \
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name: \
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.quad GLUE(.,name); \
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.quad .TOC.@tocbase; \
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.quad 0; \
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.popsection; \
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.type GLUE(.,name),@function; \
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GLUE(.,name):
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#endif /* PPC64_ELF_ABI_v2 */
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#else /* 32-bit */
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#define ENTRY(name) \
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.text; \
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.p2align 4; \
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.weak name; \
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.type name,@function; \
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name:
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#endif /* __powerpc64__ */
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ENTRY(setjmp)
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ST_REG 31, JMP_r31(3)
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/* r1, r2, r14-r30 */
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ST_REG 1, JMP_r1 (3)
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ST_REG 2, JMP_r2 (3)
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ST_REG 14, JMP_r14(3)
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ST_REG 15, JMP_r15(3)
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ST_REG 16, JMP_r16(3)
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ST_REG 17, JMP_r17(3)
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ST_REG 18, JMP_r18(3)
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ST_REG 19, JMP_r19(3)
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ST_REG 20, JMP_r20(3)
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ST_REG 21, JMP_r21(3)
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ST_REG 22, JMP_r22(3)
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ST_REG 23, JMP_r23(3)
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ST_REG 24, JMP_r24(3)
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ST_REG 25, JMP_r25(3)
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ST_REG 26, JMP_r26(3)
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ST_REG 27, JMP_r27(3)
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ST_REG 28, JMP_r28(3)
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ST_REG 29, JMP_r29(3)
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ST_REG 30, JMP_r30(3)
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/* cr, lr, ctr, xer */
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mfcr 0
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ST_REG 0, JMP_cr(3)
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mflr 0
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ST_REG 0, JMP_lr(3)
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mfctr 0
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ST_REG 0, JMP_ctr(3)
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mfxer 0
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ST_REG 0, JMP_xer(3)
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/* f14-f31, fpscr */
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li 3, 0
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blr
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ENTRY(longjmp)
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LD_REG 31, JMP_r31(3)
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/* r1, r2, r14-r30 */
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LD_REG 1, JMP_r1 (3)
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LD_REG 2, JMP_r2 (3)
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LD_REG 14, JMP_r14(3)
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LD_REG 15, JMP_r15(3)
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LD_REG 16, JMP_r16(3)
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LD_REG 17, JMP_r17(3)
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LD_REG 18, JMP_r18(3)
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LD_REG 19, JMP_r19(3)
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LD_REG 20, JMP_r20(3)
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LD_REG 21, JMP_r21(3)
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LD_REG 22, JMP_r22(3)
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LD_REG 23, JMP_r23(3)
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LD_REG 24, JMP_r24(3)
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LD_REG 25, JMP_r25(3)
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LD_REG 26, JMP_r26(3)
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LD_REG 27, JMP_r27(3)
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LD_REG 28, JMP_r28(3)
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LD_REG 29, JMP_r29(3)
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LD_REG 30, JMP_r30(3)
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/* cr, lr, ctr, xer */
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LD_REG 0, JMP_cr(3)
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mtcr 0
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LD_REG 0, JMP_lr(3)
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mtlr 0
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LD_REG 0, JMP_ctr(3)
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mtctr 0
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LD_REG 0, JMP_xer(3)
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mtxer 0
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/* f14-f31, fpscr */
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mr 3, 4
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blr
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#ifdef __ELF__
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.section .note.GNU-stack,"",%progbits
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#endif
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