Radhakrishna Sripada f78d5da6e7 drm/i915/tgl: Add Wa_1409825376 to tgl ... Workaround database indicates we should disable VRH clockgating in pre-production hardware. V2: - Use REG_BIT macro - Update reference in commit message(Matt) Bspec: 52890 Bspec: 49424 Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200109223727.5630-1-radhakrishna.sripada@intel.com		2020-01-15 08:29:07 -08:00
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drm	drm/i915/tgl: Add Wa_1409825376 to tgl	2020-01-15 08:29:07 -08:00
host1x	drm-misc-next for v5.6:	2019-12-17 13:57:54 +01:00
ipu-v3
vga	vga: Fix Kconfig indentation	2019-11-20 17:40:32 +01:00
Makefile