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03cb66463b
LD11 mio reset controller has a reset lines from system controller.
Add parent "resets" property to fix the following warning.
uniphier-ld11-global.dt.yaml: reset: 'resets' does not match any of the regexes: 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/1648617078-8312-1-git-send-email-hayashi.kunihiko@socionext.com
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| .. | ||
| allwinner,sun6i-a31-clock-reset.yaml | ||
| amlogic,meson-axg-audio-arb.txt | ||
| amlogic,meson-reset.yaml | ||
| ath79-reset.txt | ||
| berlin,reset.txt | ||
| bitmain,bm1880-reset.txt | ||
| brcm,bcm4908-misc-pcie-reset.yaml | ||
| brcm,bcm6345-reset.yaml | ||
| brcm,bcm7216-pcie-sata-rescal.yaml | ||
| brcm,bcm63138-pmb.txt | ||
| brcm,brcmstb-reset.yaml | ||
| canaan,k210-rst.yaml | ||
| delta,tn48m-reset.yaml | ||
| fsl,imx7-src.yaml | ||
| fsl,imx-src.yaml | ||
| hisilicon,hi3660-reset.yaml | ||
| hisilicon,hi6220-reset.txt | ||
| img,pistachio-reset.txt | ||
| intel,rcu-gw.yaml | ||
| lantiq,reset.txt | ||
| microchip,rst.yaml | ||
| nuvoton,npcm-reset.txt | ||
| nxp,lpc1850-rgu.txt | ||
| oxnas,reset.txt | ||
| qcom,aoss-reset.yaml | ||
| qcom,pdc-global.yaml | ||
| renesas,rst.yaml | ||
| renesas,rzg2l-usbphy-ctrl.yaml | ||
| reset.txt | ||
| snps,axs10x-reset.txt | ||
| snps,dw-reset.txt | ||
| snps,hsdk-reset.txt | ||
| socfpga-reset.txt | ||
| socionext,uniphier-glue-reset.yaml | ||
| socionext,uniphier-reset.yaml | ||
| st,sti-picophyreset.txt | ||
| st,sti-powerdown.txt | ||
| st,sti-softreset.txt | ||
| st,stm32-rcc.txt | ||
| st,stm32mp1-rcc.txt | ||
| starfive,jh7100-reset.yaml | ||
| ti-syscon-reset.txt | ||
| ti,sci-reset.yaml | ||
| xlnx,zynqmp-reset.txt | ||
| zynq-reset.txt | ||