Daniel Miess f528fa3989 drm/amd/display: Add shift and mask for ICH_RESET_AT_END_OF_LINE ... [Why] DP DSC compliance failing for dcn314 due to ICH_RESET_AT_END_OF_LINE shift and mask being missing [How] Add in shift and mask for ICH_RESET_AT_END_OF_LINE Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Wayne Lin <wayne.lin@amd.com> Signed-off-by: Daniel Miess <Daniel.Miess@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-09-21 17:30:33 -04:00
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acp
amdgpu	drm/amdgpu: Update PTE flags with TF enabled	2022-09-21 17:14:09 -04:00
amdkfd	drm/amdkfd: Fix isa version for the GC 10.3.7	2022-08-25 13:54:08 -04:00
display	drm/amd/display: Add shift and mask for ICH_RESET_AT_END_OF_LINE	2022-09-21 17:30:33 -04:00
include	drm/amdgpu: Update mes_v11_api_def.h	2022-08-30 16:56:21 -04:00
pm	drm/amd/pm: disable BACO entry/exit completely on several sienna cichlid cards	2022-09-13 14:25:39 -04:00