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Indirect register access goes through a DCR bus bridge, which allows only one outstanding transaction. And to make matters worse, each TEMAC IP block contains two Ethernet interfaces, and although they seem to have separate registers for indirect access, they actually share the registers. Or to be more specific, MSW, LSW and CTL registers are physically shared between Ethernet interfaces in same TEMAC IP, with RDY register being (almost) specificic to the Ethernet interface. The 0x10000 bit in RDY reflects combined bus ready state though. So we need to take care to synchronize not only within a single device, but also between devices in same TEMAC IP. This commit allows to do that with legacy platform devices. For OF devices, the xlnx,compound parent of the temac node should be used to find siblings, and setup a shared indirect_mutex between them. I will leave this work to somebody else, as I don't have hardware to test that. No regression is introduced by that, as before this commit using two Ethernet interfaces in same TEMAC block is simply broken. Signed-off-by: Esben Haabendal <esben@geanix.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
28 lines
1.0 KiB
C
28 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __LINUX_XILINX_LL_TEMAC_H
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#define __LINUX_XILINX_LL_TEMAC_H
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#include <linux/if_ether.h>
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#include <linux/phy.h>
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struct ll_temac_platform_data {
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bool txcsum; /* Enable/disable TX checksum */
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bool rxcsum; /* Enable/disable RX checksum */
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u8 mac_addr[ETH_ALEN]; /* MAC address (6 bytes) */
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/* Clock frequency for input to MDIO clock generator */
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u32 mdio_clk_freq;
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unsigned long long mdio_bus_id; /* Unique id for MDIO bus */
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int phy_addr; /* Address of the PHY to connect to */
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phy_interface_t phy_interface; /* PHY interface mode */
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bool reg_little_endian; /* Little endian TEMAC register access */
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bool dma_little_endian; /* Little endian DMA register access */
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/* Pre-initialized mutex to use for synchronizing indirect
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* register access. When using both interfaces of a single
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* TEMAC IP block, the same mutex should be passed here, as
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* they share the same DCR bus bridge.
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*/
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struct mutex *indirect_mutex;
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};
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#endif /* __LINUX_XILINX_LL_TEMAC_H */
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