Boyuan Zhang e3026a057f drm/amdgpu/vcn3: send smu interface type ... For VCN FW to detect ASIC type, in order to use different mailbox registers. V2: simplify codes and fix format issue. Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com> Acked-by Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-03-28 12:54:38 -04:00
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acp
amdgpu	drm/amdgpu/vcn3: send smu interface type	2022-03-28 12:54:38 -04:00
amdkfd	drm/amdgpu: remove table_freed param from the VM code	2022-03-25 12:40:52 -04:00
display	drm/amd/display: move FPU related code from dcn316 to dml/dcn31 folder	2022-03-25 12:40:26 -04:00
include	drm/amdgpu: config HDP_MISC_CNTL.READ_BUFFER_WATERMARK	2022-02-24 17:24:43 -05:00
pm	amdgpu/pm: Implement emit_clk_levels for vega10	2022-03-28 12:54:32 -04:00