Jonathan Marek 1ef7c99d14 drm/msm/dsi: add support for 7nm DSI PHY/PLL ... This adds support for the 7nm ("V4") DSI PHY/PLL for sm8150 and sm8250. Implementation is based on 10nm driver, but updated based on the downstream 7nm driver. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Tested-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> (SM8250) Signed-off-by: Rob Clark <robdclark@chromium.org>		2020-09-12 09:59:58 -07:00
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dsi_phy_7nm.c	drm/msm/dsi: add support for 7nm DSI PHY/PLL	2020-09-12 09:59:58 -07:00
dsi_phy_10nm.c	drm/msm/dsi: Add parentheses to quirks check in dsi_phy_hw_v3_0_lane_settings	2019-06-19 12:30:55 -07:00
dsi_phy_14nm.c	drm/msm/dsi: Add phy configuration for SDM630/636/660	2020-07-31 06:46:17 -07:00
dsi_phy_20nm.c	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284	2019-06-05 17:36:37 +02:00
dsi_phy_28nm_8960.c	drm/msm: drop use of drmP.h	2019-09-03 16:16:57 -07:00
dsi_phy_28nm.c	drm/msm/dsi: Add configuration for 28nm PLL on family B	2019-11-04 13:17:42 -08:00
dsi_phy.c	drm/msm/dsi: add support for 7nm DSI PHY/PLL	2020-09-12 09:59:58 -07:00
dsi_phy.h	drm/msm/dsi: add support for 7nm DSI PHY/PLL	2020-09-12 09:59:58 -07:00