Jun Lei db31af12a5 drm/amd/display: cap DCFCLK hardmin to 507 for NV10 ... [why] Due to limitation in SMU/PPLIB, it is not possible to know Fmax @ Vmin for DCFCLK. This causes issues at high display configurations where extra headroom of DCFCLK can enable P-state switching [how] Use existing override logic. If override not defined, then force min = 507 Signed-off-by: Jun Lei <Jun.Lei@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Leo Li <sunpeng.li@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2019-07-18 14:17:18 -05:00
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acp	treewide: Add SPDX license identifier - Makefile/Kconfig	2019-05-21 10:50:46 +02:00
amdgpu	drm/amdgpu: use VCN firmware offset for cache window	2019-07-18 14:17:18 -05:00
amdkfd	drm/amdkfd: Remove GWS from process during uninit	2019-07-17 13:34:31 -05:00
display	drm/amd/display: cap DCFCLK hardmin to 507 for NV10	2019-07-18 14:17:18 -05:00
include	drm/amd/powerplay: increase the SMU msg response waiting time	2019-07-11 14:37:23 -05:00
powerplay	drm/amd/powerplay: change sysfs pp_dpm_xxx format for navi10	2019-07-18 14:17:18 -05:00