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The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
257 lines
4.6 KiB
Plaintext
257 lines
4.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* at91-kizbox2_common.dtsi - Device Tree Include file for
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* Overkiz Kizbox 2 family SoC
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*
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* Copyright (C) 2014-2018 Overkiz SAS
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*
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* Authors: Antoine Aubert <a.aubert@overkiz.com>
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* Gaël Portay <g.portay@overkiz.com>
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* Kévin Raymond <k.raymond@overkiz.com>
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*/
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#include "sama5d31.dtsi"
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/ {
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chosen {
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bootargs = "ubi.mtd=ubi";
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stdout-path = &dbgu;
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};
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memory@20000000 {
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reg = <0x20000000 0x10000000>;
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};
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clocks {
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slow_xtal {
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clock-frequency = <32768>;
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};
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main_xtal {
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clock-frequency = <12000000>;
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-prog {
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label = "PB_PROG";
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gpios = <&pioE 27 GPIO_ACTIVE_LOW>;
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linux,code = <0x102>;
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wakeup-source;
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};
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button-reset {
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label = "PB_RST";
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gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
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linux,code = <0x100>;
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wakeup-source;
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};
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button-user {
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label = "PB_USER";
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gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
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linux,code = <0x101>;
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wakeup-source;
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};
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};
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led-controller {
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compatible = "pwm-leds";
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led-1 {
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label = "pwm:blue:user";
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pwms = <&pwm0 2 10000000 0>;
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max-brightness = <255>;
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linux,default-trigger = "none";
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};
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led-2 {
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label = "pwm:green:user";
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pwms = <&pwm0 1 10000000 0>;
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max-brightness = <255>;
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linux,default-trigger = "default-on";
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};
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led-3 {
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label = "pwm:red:user";
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pwms = <&pwm0 0 10000000 0>;
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max-brightness = <255>;
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linux,default-trigger = "default-on";
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};
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};
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};
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&i2c1 {
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status = "okay";
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pmic: act8865@5b {
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compatible = "active-semi,act8865";
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reg = <0x5b>;
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status = "okay";
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regulators {
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vcc_1v8_reg: DCDC_REG1 {
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regulator-name = "VCC_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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regulator-always-on;
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};
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vcc_1v2_reg: DCDC_REG2 {
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regulator-name = "VCC_1V2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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regulator-always-on;
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};
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vcc_3v3_reg: DCDC_REG3 {
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regulator-name = "VCC_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vddfuse_reg: LDO_REG1 {
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regulator-name = "FUSE_2V5";
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regulator-min-microvolt = <2500000>;
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regulator-max-microvolt = <2500000>;
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};
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vddana_reg: LDO_REG2 {
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regulator-name = "VDDANA";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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vled_reg: LDO_REG3 {
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regulator-name = "VLED";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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v3v8_rf_reg: LDO_REG4 {
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regulator-name = "V3V8_RF";
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regulator-min-microvolt = <3800000>;
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regulator-max-microvolt = <3800000>;
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regulator-always-on;
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};
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};
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};
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};
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&usart0 {
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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&usart1 {
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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&usart2 {
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atmel,use-dma-rx;
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atmel,use-dma-tx;
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status = "disabled";
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};
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&pwm0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm0_pwmh0_1
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&pinctrl_pwm0_pwmh1_1
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&pinctrl_pwm0_pwmh2_0>;
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status = "okay";
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};
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&adc0 {
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atmel,adc-vref = <3333>;
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status = "okay";
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};
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&macb1 {
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phy-mode = "rmii";
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status = "okay";
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};
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&dbgu {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&ebi {
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pinctrl-0 = <&pinctrl_ebi_nand_addr>;
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pinctrl-names = "default";
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status = "okay";
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};
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&nand_controller {
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status = "okay";
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nand@3 {
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reg = <0x3 0x0 0x2>;
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atmel,rb = <0>;
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nand-bus-width = <8>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <4>;
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nand-ecc-step-size = <512>;
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nand-on-flash-bbt;
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label = "atmel_nand";
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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bootstrap@0 {
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label = "bootstrap";
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reg = <0x0 0x20000>;
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};
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ubi@20000 {
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label = "ubi";
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reg = <0x20000 0x7fe0000>;
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};
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};
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};
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};
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&usb1 {
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status = "okay";
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};
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&usb2 {
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status = "okay";
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};
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/* WMBUS (inverted with IO in the latest schematic) */
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&pinctrl_usart0 {
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atmel,pins =
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<AT91_PIOD 17 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOD 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOE 2 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
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};
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/* RTS */
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&pinctrl_usart1 {
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atmel,pins =
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<AT91_PIOB 28 AT91_PERIPH_A AT91_PINCTRL_NONE
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AT91_PIOB 29 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
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AT91_PIOE 7 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
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};
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/* IO (inverted with WMBUS in the latest schematic) */
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&pinctrl_usart2 {
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atmel,pins =
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<AT91_PIOE 25 AT91_PERIPH_B AT91_PINCTRL_NONE
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AT91_PIOE 26 AT91_PERIPH_B AT91_PINCTRL_PULL_UP
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AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_MULTI_DRIVE>;
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};
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