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afd36e9d91
Add various clock controllers found in the MT7988 SoC to existing bindings (if applicable) and add files for the new ethwarp, mcusys and xfi-pll clock controllers not previously present in any SoC. Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/07e76a544ce4392bcb88e34d5480e99bb7994618.1702849494.git.daniel@makrotopia.org Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
65 lines
1.7 KiB
YAML
65 lines
1.7 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/mediatek,apmixedsys.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MediaTek AP Mixedsys Controller
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maintainers:
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- Michael Turquette <mturquette@baylibre.com>
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- Stephen Boyd <sboyd@kernel.org>
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description:
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The Mediatek apmixedsys controller provides PLLs to the system.
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The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
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properties:
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compatible:
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oneOf:
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- enum:
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- mediatek,mt6797-apmixedsys
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- mediatek,mt7622-apmixedsys
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- mediatek,mt7981-apmixedsys
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- mediatek,mt7986-apmixedsys
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- mediatek,mt7988-apmixedsys
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- mediatek,mt8135-apmixedsys
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- mediatek,mt8173-apmixedsys
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- mediatek,mt8516-apmixedsys
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- items:
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- const: mediatek,mt7623-apmixedsys
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- const: mediatek,mt2701-apmixedsys
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- const: syscon
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- items:
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- enum:
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- mediatek,mt2701-apmixedsys
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- mediatek,mt2712-apmixedsys
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- mediatek,mt6765-apmixedsys
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- mediatek,mt6779-apmixedsys
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- mediatek,mt6795-apmixedsys
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- mediatek,mt7629-apmixedsys
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- mediatek,mt8167-apmixedsys
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- mediatek,mt8183-apmixedsys
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- const: syscon
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reg:
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maxItems: 1
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'#clock-cells':
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const: 1
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required:
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- compatible
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- reg
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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apmixedsys: clock-controller@10209000 {
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compatible = "mediatek,mt8173-apmixedsys";
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reg = <0x10209000 0x1000>;
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#clock-cells = <1>;
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};
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