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a334e45dcb
We would not be matching the following chip/compatible strings
combinations, which would lead to not setting the warm boot flag
correctly, fix that:
7260A0/B0: brcm,brcmstb-memc-ddr-rev-b.2.1
7255A0: brcm,brcmstb-memc-ddr-rev-b.2.3
7278Bx: brcm,brcmstb-memc-ddr-rev-b.3.1
The B2.1 core (which is in 7260 A0 and B0) doesn't have the
SHIMPHY_ADDR_CNTL_0_DDR_PAD_CNTRL setup in the memsys init code, nor
does it have the warm boot flag re-definition on entry. Those changes
were for B2.2 and later MEMSYS cores. Fall back to the previous S2/S3
entry method for these specific chips.
Fixes:
|
||
|---|---|---|
| .. | ||
| brcm,bcm2835.txt | ||
| brcm,bcm4708.txt | ||
| brcm,bcm11351-cpu-method.txt | ||
| brcm,bcm11351.txt | ||
| brcm,bcm21664.txt | ||
| brcm,bcm23550-cpu-method.txt | ||
| brcm,bcm23550.txt | ||
| brcm,bcm63138.txt | ||
| brcm,brcmstb.txt | ||
| brcm,cygnus.txt | ||
| brcm,hr2.txt | ||
| brcm,ns2.txt | ||
| brcm,nsp-cpu-method.txt | ||
| brcm,nsp.txt | ||
| brcm,stingray.txt | ||
| brcm,vulcan-soc.txt | ||
| raspberrypi,bcm2835-firmware.txt | ||