Duncan Ma d1b4a51a4c drm/amd/display: Fix OTG H timing reset for dcn314 ... [Why] When ODM is enabled, H timing control register reset to 0. Div mode manual field get overwritten causing no display on certain modes for dcn314. [How] Use REG_UPDATE instead of REG_SET to set div_mode field. Reviewed-by: Charlene Liu <Charlene.Liu@amd.com> Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Duncan Ma <duncan.ma@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-08-30 16:59:55 -04:00
..
acp
amdgpu	drm/amdgpu: Update mes_v11_api_def.h	2022-08-30 16:56:21 -04:00
amdkfd	drm/amdkfd: Fix isa version for the GC 10.3.7	2022-08-25 13:54:08 -04:00
display	drm/amd/display: Fix OTG H timing reset for dcn314	2022-08-30 16:59:55 -04:00
include	drm/amdgpu: Update mes_v11_api_def.h	2022-08-30 16:56:21 -04:00
pm	drm/amd/pm: update SMU 13.0.0 driver_if header	2022-08-25 13:53:48 -04:00