Jayachandran C d150cef4e8 MIPS: Netlogic: XLP9XX PIC updates ... Functions for the XLP9XX interrupt table entry format and other PIC register changes. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6279/		2014-01-24 22:39:48 +01:00
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bridge.h	MIPS: Netlogic: Read memory from DRAM BARs	2013-09-03 23:22:18 +02:00
cpucontrol.h	MIPS: Netlogic: Split XLP L1 i-cache among threads	2013-02-17 00:15:20 +01:00
iomap.h	MIPS: Netlogic: update iomap.h for XLP9XX	2014-01-24 22:39:48 +01:00
pcibus.h	MIPS: Netlogic: Add MSI support for XLP	2014-01-24 22:39:46 +01:00
pic.h	MIPS: Netlogic: XLP9XX PIC updates	2014-01-24 22:39:48 +01:00
sys.h	MIPS: Netlogic: XLP2XX CPU and PIC frequency	2013-09-03 23:22:19 +02:00
uart.h	MIPS: Whitespace cleanup.	2013-02-01 10:00:22 +01:00
xlp.h	MIPS: Netlogic: Identify XLP 9XX chip	2014-01-24 22:39:48 +01:00