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290deaa10c
This patch adds basic DT for Microchip lan966x SoC and associated board pcb8291(2-port EVB). Adds peripherals required to allow booting: Interrupt Controller, Clock, Generic ARMv7 Timers, Synopsys Timer, Flexcoms, GPIOs. Also adds other peripherals like crypto(AES/SHA), DMA, Watchdog Timer, TRNG and MCAN0. Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20220221080858.14233-1-kavyasree.kotagiri@microchip.com
65 lines
1.1 KiB
Plaintext
65 lines
1.1 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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/*
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* lan966x_pcb8291.dts - Device Tree file for PCB8291
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*/
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/dts-v1/;
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#include "lan966x.dtsi"
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/ {
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model = "Microchip EVB - LAN9662";
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compatible = "microchip,lan9662-pcb8291", "microchip,lan9662", "microchip,lan966";
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chosen {
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stdout-path = "serial0:115200n8";
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};
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aliases {
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serial0 = &usart3;
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};
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};
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&gpio {
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fc_shrd7_pins: fc_shrd7-pins {
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pins = "GPIO_49";
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function = "fc_shrd7";
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};
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fc_shrd8_pins: fc_shrd8-pins {
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pins = "GPIO_54";
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function = "fc_shrd8";
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};
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fc3_b_pins: fcb3-spi-pins {
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/* SCK, RXD, TXD */
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pins = "GPIO_51", "GPIO_52", "GPIO_53";
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function = "fc3_b";
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};
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can0_b_pins: can0_b_pins {
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/* RX, TX */
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pins = "GPIO_35", "GPIO_36";
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function = "can0_b";
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};
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};
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&can0 {
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pinctrl-0 = <&can0_b_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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&flx3 {
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atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
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status = "okay";
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usart3: serial@200 {
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pinctrl-0 = <&fc3_b_pins>, <&fc_shrd7_pins>, <&fc_shrd8_pins>;
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pinctrl-names = "default";
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status = "okay";
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};
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};
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&watchdog {
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status = "okay";
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};
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