mirror of
https://git.proxmox.com/git/mirror_ubuntu-kernels.git
synced 2025-12-25 09:11:49 +00:00
After a somewhat quiet 5.17 release, the size of the DT changes
is a bit larger again. There are nine new SoC that get added,
all of them related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the
LG Nexus 5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs,
along with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC losely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added all
over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner,
i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)
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5doTbIUJZuUwPsJDRXe7tTt6ZJclr6XvO8/Us8iQ6OIS5V+EHVJEKWVGrgoZu/eU
LqZqbAZK43csnOid1Q/lDqh9eEGy5Xs8U7ivL+EIOuklYcE2110C0SVC9bsfWRES
u9Xx0b+LeIrp0lsyZFAbQTFGbx/pdvxwDZUjcC7coJRfJedKt6Z1NnnCSj9c0hAX
v9ZtRnPkgnOAzVINwsci2dtrcxBUPqYN9JxX4aW47BMftiASBv8y8xmeE7KVvAyq
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Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"After a somewhat quiet 5.17 release, the size of the DT changes is a
bit larger again. There are nine new SoC that get added, all of them
related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added
all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic:
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno:
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar:
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)"
* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
arm64: dts: n5x: drop invalid property and fix edac node name
arm64: dts: fsd: Add the MCT support
arm64: dts: stingray: Fix spi clock name
arm64: dts: ns2: Fix spi clock name
ARM: dts: rockchip: Update regulator name for PX3
ARM: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
ARM: dts: at91: sama7g5: Add NAND support
ARM: dts: at91: sama7g5: add eic node
ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
arm64: dts: lg: align pl330 node name with dtschema
arm64: dts: lg: add dma-cells to pl330 node
arm64: dts: juno: align pl330 node name with dtschema
arm64: dts: broadcom: Fix sata nodename
arm64: dts: n5x: add sdr edac support
arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
dt-bindings: usb: dwc2: add disable-over-current
...
1352 lines
28 KiB
Plaintext
1352 lines
28 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright 2018-2020 Purism SPC
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*/
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/dts-v1/;
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#include "dt-bindings/input/input.h"
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#include <dt-bindings/interrupt-controller/irq.h>
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#include "dt-bindings/pwm/pwm.h"
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#include "dt-bindings/usb/pd.h"
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#include "imx8mq.dtsi"
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/ {
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model = "Purism Librem 5";
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compatible = "purism,librem5", "fsl,imx8mq";
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chassis-type = "handset";
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backlight_dsi: backlight-dsi {
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compatible = "led-backlight";
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leds = <&led_backlight>;
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};
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pmic_osc: clock-pmic {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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clock-output-names = "pmic_osc";
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};
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chosen {
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stdout-path = &uart1;
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};
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_keys>;
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vol-down {
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label = "VOL_DOWN";
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gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEDOWN>;
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debounce-interval = <50>;
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};
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vol-up {
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label = "VOL_UP";
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gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_VOLUMEUP>;
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debounce-interval = <50>;
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};
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};
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reg_aud_1v8: regulator-audio-1v8 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audiopwr>;
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regulator-name = "AUDIO_PWR_EN";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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/*
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* the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC
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* since we can't have it twice in the 2 different regulator nodes.
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*/
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reg_csi_1v8: regulator-csi-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "CAMERA_VDDIO_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <®_vdd_3v3>;
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gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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/* controlled by the CAMERA_POWER_KEY HKS */
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reg_vcam_1v2: regulator-vcam-1v2 {
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compatible = "regulator-fixed";
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regulator-name = "CAMERA_VDDD_1V2";
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regulator-min-microvolt = <1200000>;
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regulator-max-microvolt = <1200000>;
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vin-supply = <®_vdd_1v8>;
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enable-active-high;
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};
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reg_vcam_2v8: regulator-vcam-2v8 {
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compatible = "regulator-fixed";
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regulator-name = "CAMERA_VDDA_2V8";
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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vin-supply = <®_vdd_3v3>;
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gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_gnss: regulator-gnss {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gnsspwr>;
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regulator-name = "GNSS";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_hub: regulator-hub {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hub_pwr>;
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regulator-name = "HUB";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_lcd_1v8: regulator-lcd-1v8 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dsien>;
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regulator-name = "LCD_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <®_vdd_1v8>;
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gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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/* Otherwise i2c3 is not functional */
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regulator-always-on;
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};
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reg_lcd_3v4: regulator-lcd-3v4 {
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compatible = "regulator-fixed";
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regulator-name = "LCD_3V4";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_dsibiasen>;
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vin-supply = <®_vsys_3v4>;
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gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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reg_vdd_sen: regulator-vdd-sen {
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compatible = "regulator-fixed";
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regulator-name = "VDD_SEN";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_vdd_1v8: regulator-vdd-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "VDD_1V8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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vin-supply = <&buck7_reg>;
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};
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reg_vdd_3v3: regulator-vdd-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "VDD_3V3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_vsys_3v4: regulator-vsys-3v4 {
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compatible = "regulator-fixed";
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regulator-name = "VSYS_3V4";
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regulator-min-microvolt = <3400000>;
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regulator-max-microvolt = <3400000>;
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regulator-always-on;
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};
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reg_wifi_3v3: regulator-wifi-3v3 {
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compatible = "regulator-fixed";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wifi_pwr>;
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regulator-name = "3V3_WIFI";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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vin-supply = <®_vdd_3v3>;
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};
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sound {
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compatible = "simple-audio-card";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_hp>;
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simple-audio-card,name = "Librem 5";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Headphone", "Headphones",
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"Microphone", "Headset Mic",
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"Microphone", "Digital Mic",
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"Speaker", "Speaker";
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simple-audio-card,routing =
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"Headphones", "HPOUTL",
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"Headphones", "HPOUTR",
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"Speaker", "SPKOUTL",
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"Speaker", "SPKOUTR",
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"Headset Mic", "MICBIAS",
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"IN3R", "Headset Mic",
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"DMICDAT", "Digital Mic";
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simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
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simple-audio-card,cpu {
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sound-dai = <&sai2>;
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};
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simple-audio-card,codec {
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sound-dai = <&codec>;
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clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
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frame-master;
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bitclock-master;
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};
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};
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sound-wwan {
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compatible = "simple-audio-card";
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simple-audio-card,name = "Modem";
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simple-audio-card,format = "i2s";
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simple-audio-card,cpu {
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sound-dai = <&sai6>;
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frame-inversion;
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};
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simple-audio-card,codec {
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sound-dai = <&bm818_codec>;
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frame-master;
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bitclock-master;
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};
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};
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usdhc2_pwrseq: pwrseq {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
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<&gpio4 29 GPIO_ACTIVE_HIGH>;
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};
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bm818_codec: sound-wwan-codec {
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compatible = "broadmobi,bm818", "option,gtm601";
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#sound-dai-cells = <0>;
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};
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vibrator {
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compatible = "pwm-vibrator";
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pwms = <&pwm1 0 1000000000 0>;
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pwm-names = "enable";
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vcc-supply = <®_vdd_3v3>;
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};
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};
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&A53_0 {
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cpu-supply = <&buck2_reg>;
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};
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&A53_1 {
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cpu-supply = <&buck2_reg>;
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};
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&A53_2 {
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cpu-supply = <&buck2_reg>;
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};
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&A53_3 {
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cpu-supply = <&buck2_reg>;
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};
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&csi1 {
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status = "okay";
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};
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&ddrc {
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operating-points-v2 = <&ddrc_opp_table>;
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status = "okay";
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ddrc_opp_table: opp-table {
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compatible = "operating-points-v2";
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opp-25M {
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opp-hz = /bits/ 64 <25000000>;
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};
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opp-100M {
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opp-hz = /bits/ 64 <100000000>;
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};
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opp-800M {
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opp-hz = /bits/ 64 <800000000>;
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};
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};
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};
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&dphy {
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status = "okay";
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};
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&ecspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "okay";
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nor_flash: flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <1000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "protected0";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "protected1";
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reg = <0x30000 0x10000>;
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read-only;
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};
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partition@40000 {
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|
label = "rw";
|
|
reg = <0x40000 0x1C0000>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&gpio1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pmic_5v>;
|
|
|
|
pmic-5v-hog {
|
|
gpio-hog;
|
|
gpios = <1 GPIO_ACTIVE_HIGH>;
|
|
input;
|
|
lane-mapping = "pmic-5v";
|
|
};
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl_audiopwr: audiopwrgrp {
|
|
fsl,pins = <
|
|
/* AUDIO_POWER_EN_3V3 */
|
|
MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_bl: blgrp {
|
|
fsl,pins = <
|
|
/* BACKLINGE_EN */
|
|
MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_bt: btgrp {
|
|
fsl,pins = <
|
|
/* BT_REG_ON */
|
|
MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_camera_pwr: camerapwrgrp {
|
|
fsl,pins = <
|
|
/* CAMERA_PWR_EN_3V3 */
|
|
MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_csi1: csi1grp {
|
|
fsl,pins = <
|
|
/* CSI1_NRST */
|
|
MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_charger_in: chargeringrp {
|
|
fsl,pins = <
|
|
/* CHRG_INT */
|
|
MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x80
|
|
/* CHG_STATUS_B */
|
|
MX8MQ_IOMUXC_NAND_ALE_GPIO3_IO0 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_dsibiasen: dsibiasengrp {
|
|
fsl,pins = <
|
|
/* DSI_BIAS_EN */
|
|
MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_dsien: dsiengrp {
|
|
fsl,pins = <
|
|
/* DSI_EN_3V3 */
|
|
MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_dsirst: dsirstgrp {
|
|
fsl,pins = <
|
|
/* DSI_RST */
|
|
MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29 0x83
|
|
/* DSI_TE */
|
|
MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28 0x83
|
|
/* TP_RST */
|
|
MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspigrp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI 0x83
|
|
MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO 0x83
|
|
MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x19
|
|
MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_gauge: gaugegrp {
|
|
fsl,pins = <
|
|
/* BAT_LOW */
|
|
MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_gnsspwr: gnsspwrgrp {
|
|
fsl,pins = <
|
|
/* GPS3V3_EN */
|
|
MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_haptic: hapticgrp {
|
|
fsl,pins = <
|
|
/* MOTO */
|
|
MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_hp: hpgrp {
|
|
fsl,pins = <
|
|
/* HEADPHONE_DET_1V8 */
|
|
MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9 0x180
|
|
>;
|
|
};
|
|
|
|
pinctrl_hub_pwr: hubpwrgrp {
|
|
fsl,pins = <
|
|
/* HUB_PWR_3V3_EN */
|
|
MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL 0x40000026
|
|
MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA 0x40000026
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c2: i2c2grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL 0x40000026
|
|
MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA 0x40000026
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL 0x40000026
|
|
MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA 0x40000026
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c4: i2c4grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL 0x40000026
|
|
MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA 0x40000026
|
|
>;
|
|
};
|
|
|
|
pinctrl_keys: keysgrp {
|
|
fsl,pins = <
|
|
/* VOL- */
|
|
MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17 0x01C0
|
|
/* VOL+ */
|
|
MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16 0x01C0
|
|
>;
|
|
};
|
|
|
|
pinctrl_led_b: ledbgrp {
|
|
fsl,pins = <
|
|
/* LED_B */
|
|
MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT 0x06
|
|
>;
|
|
};
|
|
|
|
pinctrl_led_g: ledggrp {
|
|
fsl,pins = <
|
|
/* LED_G */
|
|
MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT 0x06
|
|
>;
|
|
};
|
|
|
|
pinctrl_led_r: ledrgrp {
|
|
fsl,pins = <
|
|
/* LED_R */
|
|
MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT 0x06
|
|
>;
|
|
};
|
|
|
|
pinctrl_mag: maggrp {
|
|
fsl,pins = <
|
|
/* INT_MAG */
|
|
MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_pmic: pmicgrp {
|
|
fsl,pins = <
|
|
/* PMIC_NINT */
|
|
MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_pmic_5v: pmic5vgrp {
|
|
fsl,pins = <
|
|
/* PMIC_5V */
|
|
MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_prox: proxgrp {
|
|
fsl,pins = <
|
|
/* INT_LIGHT */
|
|
MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_rtc: rtcgrp {
|
|
fsl,pins = <
|
|
/* RTC_INT */
|
|
MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_sai2: sai2grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0 0xd6
|
|
MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC 0xd6
|
|
MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK 0xd6
|
|
MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0 0xd6
|
|
MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK 0xd6
|
|
>;
|
|
};
|
|
|
|
pinctrl_sai6: sai6grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0 0xd6
|
|
MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC 0xd6
|
|
MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK 0xd6
|
|
MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0 0xd6
|
|
>;
|
|
};
|
|
|
|
pinctrl_tcpc: tcpcgrp {
|
|
fsl,pins = <
|
|
/* TCPC_INT */
|
|
MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x01C0
|
|
>;
|
|
};
|
|
|
|
pinctrl_touch: touchgrp {
|
|
fsl,pins = <
|
|
/* TP_INT */
|
|
MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27 0x80
|
|
>;
|
|
};
|
|
|
|
pinctrl_typec: typecgrp {
|
|
fsl,pins = <
|
|
/* TYPEC_MUX_EN */
|
|
MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49
|
|
MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart2: uart2grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX 0x49
|
|
MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX 0x49
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX 0x49
|
|
MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX 0x49
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX 0x49
|
|
MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX 0x49
|
|
MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B 0x49
|
|
MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B 0x49
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x83
|
|
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xc3
|
|
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xc3
|
|
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x83
|
|
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x8d
|
|
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xcd
|
|
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xcd
|
|
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x8d
|
|
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK 0x9f
|
|
MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6 0xdf
|
|
MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7 0xdf
|
|
MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE 0x9f
|
|
MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B 0xc1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2: usdhc2grp {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
|
|
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x83
|
|
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xc3
|
|
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xc3
|
|
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xc3
|
|
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xc3
|
|
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xc3
|
|
MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
|
|
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x8d
|
|
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcd
|
|
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcd
|
|
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcd
|
|
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcd
|
|
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcd
|
|
MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
|
|
fsl,pins = <
|
|
MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12 0x80
|
|
MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK 0x9f
|
|
MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD 0xcf
|
|
MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0 0xcf
|
|
MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1 0xcf
|
|
MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2 0xcf
|
|
MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3 0xcf
|
|
MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
|
|
>;
|
|
};
|
|
|
|
pinctrl_wifi_disable: wifidisablegrp {
|
|
fsl,pins = <
|
|
/* WIFI_REG_ON */
|
|
MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_wifi_pwr: wifipwrgrp {
|
|
fsl,pins = <
|
|
/* WIFI3V3_EN */
|
|
MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10 0x83
|
|
>;
|
|
};
|
|
|
|
pinctrl_wdog: wdoggrp {
|
|
fsl,pins = <
|
|
/* nWDOG */
|
|
MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B 0x1f
|
|
>;
|
|
};
|
|
};
|
|
|
|
&i2c1 {
|
|
clock-frequency = <387000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c1>;
|
|
status = "okay";
|
|
|
|
typec_pd: usb-pd@3f {
|
|
compatible = "ti,tps6598x";
|
|
reg = <0x3f>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
|
|
interrupt-names = "irq";
|
|
|
|
connector {
|
|
ports {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
usb_con_hs: endpoint {
|
|
remote-endpoint = <&typec_hs>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
usb_con_ss: endpoint {
|
|
remote-endpoint = <&typec_ss>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
pmic: pmic@4b {
|
|
compatible = "rohm,bd71837";
|
|
reg = <0x4b>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;
|
|
clocks = <&pmic_osc>;
|
|
clock-names = "osc";
|
|
clock-output-names = "pmic_clk";
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
|
rohm,reset-snvs-powered;
|
|
|
|
regulators {
|
|
buck1_reg: BUCK1 {
|
|
regulator-name = "buck1";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-boot-on;
|
|
regulator-ramp-delay = <1250>;
|
|
rohm,dvs-run-voltage = <900000>;
|
|
rohm,dvs-idle-voltage = <850000>;
|
|
rohm,dvs-suspend-voltage = <800000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck2_reg: BUCK2 {
|
|
regulator-name = "buck2";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-boot-on;
|
|
regulator-ramp-delay = <1250>;
|
|
rohm,dvs-run-voltage = <1000000>;
|
|
rohm,dvs-idle-voltage = <900000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck3_reg: BUCK3 {
|
|
regulator-name = "buck3";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
regulator-boot-on;
|
|
rohm,dvs-run-voltage = <900000>;
|
|
};
|
|
|
|
buck4_reg: BUCK4 {
|
|
regulator-name = "buck4";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1300000>;
|
|
rohm,dvs-run-voltage = <1000000>;
|
|
};
|
|
|
|
buck5_reg: BUCK5 {
|
|
regulator-name = "buck5";
|
|
regulator-min-microvolt = <700000>;
|
|
regulator-max-microvolt = <1350000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck6_reg: BUCK6 {
|
|
regulator-name = "buck6";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck7_reg: BUCK7 {
|
|
regulator-name = "buck7";
|
|
regulator-min-microvolt = <1605000>;
|
|
regulator-max-microvolt = <1995000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
buck8_reg: BUCK8 {
|
|
regulator-name = "buck8";
|
|
regulator-min-microvolt = <800000>;
|
|
regulator-max-microvolt = <1400000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo1_reg: LDO1 {
|
|
regulator-name = "ldo1";
|
|
regulator-min-microvolt = <3000000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
/* leave on for snvs power button */
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo2_reg: LDO2 {
|
|
regulator-name = "ldo2";
|
|
regulator-min-microvolt = <900000>;
|
|
regulator-max-microvolt = <900000>;
|
|
regulator-boot-on;
|
|
/* leave on for snvs power button */
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo3_reg: LDO3 {
|
|
regulator-name = "ldo3";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo4_reg: LDO4 {
|
|
regulator-name = "ldo4";
|
|
regulator-min-microvolt = <900000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo5_reg: LDO5 {
|
|
/* VDD_PHY_0V9 - MIPI and HDMI domains */
|
|
regulator-name = "ldo5";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo6_reg: LDO6 {
|
|
/* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
|
|
regulator-name = "ldo6";
|
|
regulator-min-microvolt = <900000>;
|
|
regulator-max-microvolt = <1800000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
|
|
ldo7_reg: LDO7 {
|
|
/* VDD_PHY_3V3 - USB domain */
|
|
regulator-name = "ldo7";
|
|
regulator-min-microvolt = <1800000>;
|
|
regulator-max-microvolt = <3300000>;
|
|
regulator-boot-on;
|
|
regulator-always-on;
|
|
};
|
|
};
|
|
};
|
|
|
|
rtc@68 {
|
|
compatible = "microcrystal,rv4162";
|
|
reg = <0x68>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_rtc>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
|
};
|
|
};
|
|
|
|
&i2c2 {
|
|
clock-frequency = <387000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c2>;
|
|
status = "okay";
|
|
|
|
magnetometer@1e {
|
|
compatible = "st,lsm9ds1-magn";
|
|
reg = <0x1e>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_mag>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
|
|
vdd-supply = <®_vdd_sen>;
|
|
vddio-supply = <®_vdd_1v8>;
|
|
};
|
|
|
|
regulator@3e {
|
|
compatible = "tps65132";
|
|
reg = <0x3e>;
|
|
|
|
reg_lcd_avdd: outp {
|
|
regulator-name = "LCD_AVDD";
|
|
vin-supply = <®_lcd_3v4>;
|
|
};
|
|
|
|
reg_lcd_avee: outn {
|
|
regulator-name = "LCD_AVEE";
|
|
vin-supply = <®_lcd_3v4>;
|
|
};
|
|
};
|
|
|
|
proximity: prox@60 {
|
|
compatible = "vishay,vcnl4040";
|
|
reg = <0x60>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_prox>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
|
|
};
|
|
|
|
accel_gyro: accel-gyro@6a {
|
|
compatible = "st,lsm9ds1-imu";
|
|
reg = <0x6a>;
|
|
vdd-supply = <®_vdd_sen>;
|
|
vddio-supply = <®_vdd_1v8>;
|
|
};
|
|
};
|
|
|
|
&i2c3 {
|
|
clock-frequency = <387000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c3>;
|
|
status = "okay";
|
|
|
|
codec: audio-codec@1a {
|
|
compatible = "wlf,wm8962";
|
|
reg = <0x1a>;
|
|
clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
|
|
assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
|
|
assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
|
|
assigned-clock-rates = <24576000>;
|
|
#sound-dai-cells = <0>;
|
|
mic-cfg = <0x200>;
|
|
DCVDD-supply = <®_aud_1v8>;
|
|
DBVDD-supply = <®_aud_1v8>;
|
|
AVDD-supply = <®_aud_1v8>;
|
|
CPVDD-supply = <®_aud_1v8>;
|
|
MICVDD-supply = <®_aud_1v8>;
|
|
PLLVDD-supply = <®_aud_1v8>;
|
|
SPKVDD1-supply = <®_vsys_3v4>;
|
|
SPKVDD2-supply = <®_vsys_3v4>;
|
|
gpio-cfg = <
|
|
0x0000 /* n/c */
|
|
0x0001 /* gpio2, 1: default */
|
|
0x0013 /* gpio3, 2: dmicclk */
|
|
0x0000 /* n/c, 3: default */
|
|
0x8014 /* gpio5, 4: dmic_dat */
|
|
0x0000 /* gpio6, 5: default */
|
|
>;
|
|
};
|
|
|
|
camera_front: camera@20 {
|
|
compatible = "hynix,hi846";
|
|
reg = <0x20>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_csi1>;
|
|
clocks = <&clk IMX8MQ_CLK_CLKO2>;
|
|
assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
|
|
assigned-clock-rates = <25000000>;
|
|
reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
|
|
vdda-supply = <®_vcam_2v8>;
|
|
vddd-supply = <®_vcam_1v2>;
|
|
vddio-supply = <®_csi_1v8>;
|
|
rotation = <90>;
|
|
orientation = <0>;
|
|
|
|
port {
|
|
camera1_ep: endpoint {
|
|
data-lanes = <1 2>;
|
|
link-frequencies = /bits/ 64
|
|
<80000000 200000000 300000000>;
|
|
remote-endpoint = <&mipi1_sensor_ep>;
|
|
};
|
|
};
|
|
};
|
|
|
|
backlight@36 {
|
|
compatible = "ti,lm36922";
|
|
reg = <0x36>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_bl>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
|
|
vled-supply = <®_vsys_3v4>;
|
|
ti,ovp-microvolt = <25000000>;
|
|
|
|
led_backlight: led@0 {
|
|
reg = <0>;
|
|
label = ":backlight";
|
|
linux,default-trigger = "backlight";
|
|
led-max-microamp = <20000>;
|
|
};
|
|
};
|
|
|
|
touchscreen@38 {
|
|
compatible = "edt,edt-ft5506";
|
|
reg = <0x38>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_touch>;
|
|
interrupt-parent = <&gpio1>;
|
|
interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
|
|
touchscreen-size-x = <720>;
|
|
touchscreen-size-y = <1440>;
|
|
vcc-supply = <®_lcd_1v8>;
|
|
};
|
|
};
|
|
|
|
&i2c4 {
|
|
clock-frequency = <387000>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_i2c4>;
|
|
status = "okay";
|
|
|
|
bat: fuel-gauge@36 {
|
|
compatible = "maxim,max17055";
|
|
reg = <0x36>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_gauge>;
|
|
maxim,over-heat-temp = <700>;
|
|
maxim,over-volt = <4500>;
|
|
maxim,rsns-microohm = <5000>;
|
|
};
|
|
|
|
bq25895: charger@6a {
|
|
compatible = "ti,bq25895", "ti,bq25890";
|
|
reg = <0x6a>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_charger_in>;
|
|
interrupt-parent = <&gpio3>;
|
|
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
|
|
phys = <&usb3_phy0>;
|
|
ti,precharge-current = <130000>; /* uA */
|
|
ti,minimum-sys-voltage = <3700000>; /* uV */
|
|
ti,boost-voltage = <5000000>; /* uV */
|
|
ti,boost-max-current = <500000>; /* uA */
|
|
ti,use-vinmin-threshold = <1>; /* enable VINDPM */
|
|
ti,vinmin-threshold = <3900000>; /* uV */
|
|
monitored-battery = <&bat>;
|
|
power-supplies = <&typec_pd>;
|
|
};
|
|
};
|
|
|
|
&lcdif {
|
|
status = "okay";
|
|
};
|
|
|
|
&mipi_csi1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
ports {
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
mipi1_sensor_ep: endpoint {
|
|
remote-endpoint = <&camera1_ep>;
|
|
data-lanes = <1 2>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&mipi_dsi {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
lcd_panel: panel@0 {
|
|
compatible = "mantix,mlaf057we51-x";
|
|
reg = <0>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_dsirst>;
|
|
avdd-supply = <®_lcd_avdd>;
|
|
avee-supply = <®_lcd_avee>;
|
|
vddi-supply = <®_lcd_1v8>;
|
|
backlight = <&backlight_dsi>;
|
|
reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
|
|
mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
|
|
|
|
port {
|
|
panel_in: endpoint {
|
|
remote-endpoint = <&mipi_dsi_out>;
|
|
};
|
|
};
|
|
};
|
|
|
|
ports {
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
mipi_dsi_out: endpoint {
|
|
remote-endpoint = <&panel_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pgc_gpu {
|
|
power-supply = <&buck3_reg>;
|
|
};
|
|
|
|
&pgc_mipi {
|
|
power-supply = <&ldo5_reg>;
|
|
};
|
|
|
|
&pgc_vpu {
|
|
power-supply = <&buck4_reg>;
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_haptic>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_led_b>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_led_r>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_led_g>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sai2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sai2>;
|
|
assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
|
|
assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
|
|
assigned-clock-rates = <24576000>;
|
|
status = "okay";
|
|
};
|
|
|
|
&sai6 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_sai6>;
|
|
assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
|
|
assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
|
|
assigned-clock-rates = <24576000>;
|
|
fsl,sai-synchronous-rx;
|
|
status = "okay";
|
|
};
|
|
|
|
&snvs_pwrkey {
|
|
status = "okay";
|
|
};
|
|
|
|
&snvs_rtc {
|
|
status = "disabled";
|
|
};
|
|
|
|
&uart1 { /* console */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart2 { /* TPS - GPS - DEBUG */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart2>;
|
|
status = "okay";
|
|
|
|
gnss {
|
|
compatible = "globaltop,pa6h";
|
|
vcc-supply = <®_gnss>;
|
|
current-speed = <9600>;
|
|
};
|
|
};
|
|
|
|
&uart3 { /* SMC */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 { /* BT */
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
uart-has-rtscts;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3_phy0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&usb3_phy1 {
|
|
vbus-supply = <®_hub>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usb_dwc3_0 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
dr_mode = "otg";
|
|
snps,dis_u3_susphy_quirk;
|
|
status = "okay";
|
|
|
|
port@0 {
|
|
reg = <0>;
|
|
|
|
typec_hs: endpoint {
|
|
remote-endpoint = <&usb_con_hs>;
|
|
};
|
|
};
|
|
|
|
port@1 {
|
|
reg = <1>;
|
|
|
|
typec_ss: endpoint {
|
|
remote-endpoint = <&usb_con_ss>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb_dwc3_1 {
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
/* Microchip USB2642 */
|
|
hub@1 {
|
|
compatible = "usb424,2640";
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
mass-storage@1 {
|
|
compatible = "usb424,4041";
|
|
reg = <1>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&usdhc1 {
|
|
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
|
|
assigned-clock-rates = <400000000>;
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
|
|
bus-width = <8>;
|
|
vmmc-supply = <®_vdd_3v3>;
|
|
power-supply = <®_vdd_1v8>;
|
|
non-removable;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc2 {
|
|
assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
|
|
assigned-clock-rates = <200000000>;
|
|
pinctrl-names = "default", "state_100mhz", "state_200mhz";
|
|
pinctrl-0 = <&pinctrl_usdhc2>;
|
|
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
|
|
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
|
|
bus-width = <4>;
|
|
vmmc-supply = <®_wifi_3v3>;
|
|
mmc-pwrseq = <&usdhc2_pwrseq>;
|
|
post-power-on-delay-ms = <1000>;
|
|
cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
|
|
max-frequency = <50000000>;
|
|
disable-wp;
|
|
cap-sdio-irq;
|
|
keep-power-in-suspend;
|
|
wakeup-source;
|
|
status = "okay";
|
|
};
|
|
|
|
&wdog1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_wdog>;
|
|
fsl,ext-reset-output;
|
|
status = "okay";
|
|
};
|