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Balance the irqs of the inside secure driver over all available cpus. Currently all interrupts are handled by the first CPU. From my testing with IPSec AES-GCM 256 on my MCbin with 4 Cores I get a 50% speed increase: Before the patch: 99.73 Kpps With the patch: 151.25 Kpps Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
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| .. | ||
| Makefile | ||
| safexcel_cipher.c | ||
| safexcel_hash.c | ||
| safexcel_ring.c | ||
| safexcel.c | ||
| safexcel.h | ||