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Protected mode needs to maintain (save/restore) the host's sve state, rather than relying on the host kernel to do that. This is to avoid leaking information to the host about guests and the type of operations they are performing. As a first step towards that, allocate memory mapped at hyp, per cpu, for the host sve state. The following patch will use this memory to save/restore the host state. Reviewed-by: Oliver Upton <oliver.upton@linux.dev> Signed-off-by: Fuad Tabba <tabba@google.com> Link: https://lore.kernel.org/r/20240603122852.3923848-6-tabba@google.com Signed-off-by: Marc Zyngier <maz@kernel.org>
149 lines
5.2 KiB
C
149 lines
5.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#ifndef __ARM64_KVM_HYP_H__
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#define __ARM64_KVM_HYP_H__
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#include <linux/compiler.h>
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#include <linux/kvm_host.h>
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#include <asm/alternative.h>
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#include <asm/sysreg.h>
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DECLARE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
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DECLARE_PER_CPU(unsigned long, kvm_hyp_vector);
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DECLARE_PER_CPU(struct kvm_nvhe_init_params, kvm_init_params);
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/*
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* Unified accessors for registers that have a different encoding
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* between VHE and non-VHE. They must be specified without their "ELx"
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* encoding, but with the SYS_ prefix, as defined in asm/sysreg.h.
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*/
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#if defined(__KVM_VHE_HYPERVISOR__)
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#define read_sysreg_el0(r) read_sysreg_s(r##_EL02)
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#define write_sysreg_el0(v,r) write_sysreg_s(v, r##_EL02)
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#define read_sysreg_el1(r) read_sysreg_s(r##_EL12)
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#define write_sysreg_el1(v,r) write_sysreg_s(v, r##_EL12)
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#define read_sysreg_el2(r) read_sysreg_s(r##_EL1)
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#define write_sysreg_el2(v,r) write_sysreg_s(v, r##_EL1)
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#else // !__KVM_VHE_HYPERVISOR__
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#if defined(__KVM_NVHE_HYPERVISOR__)
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#define VHE_ALT_KEY ARM64_KVM_HVHE
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#else
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#define VHE_ALT_KEY ARM64_HAS_VIRT_HOST_EXTN
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#endif
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#define read_sysreg_elx(r,nvh,vh) \
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({ \
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u64 reg; \
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asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
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__mrs_s("%0", r##vh), \
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VHE_ALT_KEY) \
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: "=r" (reg)); \
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reg; \
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})
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#define write_sysreg_elx(v,r,nvh,vh) \
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do { \
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u64 __val = (u64)(v); \
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asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \
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__msr_s(r##vh, "%x0"), \
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VHE_ALT_KEY) \
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: : "rZ" (__val)); \
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} while (0)
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#define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02)
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#define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02)
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#define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
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#define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
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#define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1)
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#define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1)
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#endif // __KVM_VHE_HYPERVISOR__
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/*
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* Without an __arch_swab32(), we fall back to ___constant_swab32(), but the
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* static inline can allow the compiler to out-of-line this. KVM always wants
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* the macro version as it's always inlined.
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*/
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#define __kvm_swab32(x) ___constant_swab32(x)
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int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
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void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_save_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_restore_vmcr_aprs(struct vgic_v3_cpu_if *cpu_if);
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int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __timer_enable_traps(struct kvm_vcpu *vcpu);
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void __timer_disable_traps(struct kvm_vcpu *vcpu);
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#endif
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
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void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
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#else
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void __vcpu_load_switch_sysregs(struct kvm_vcpu *vcpu);
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void __vcpu_put_switch_sysregs(struct kvm_vcpu *vcpu);
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void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
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#endif
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void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
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void __debug_switch_to_host(struct kvm_vcpu *vcpu);
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __debug_save_host_buffers_nvhe(struct kvm_vcpu *vcpu);
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void __debug_restore_host_buffers_nvhe(struct kvm_vcpu *vcpu);
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#endif
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void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
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void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
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void __sve_save_state(void *sve_pffr, u32 *fpsr, int save_ffr);
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void __sve_restore_state(void *sve_pffr, u32 *fpsr, int restore_ffr);
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u64 __guest_enter(struct kvm_vcpu *vcpu);
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bool kvm_host_psci_handler(struct kvm_cpu_context *host_ctxt, u32 func_id);
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __noreturn __hyp_do_panic(struct kvm_cpu_context *host_ctxt, u64 spsr,
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u64 elr, u64 par);
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#endif
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __pkvm_init_switch_pgd(phys_addr_t phys, unsigned long size,
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phys_addr_t pgd, void *sp, void *cont_fn);
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int __pkvm_init(phys_addr_t phys, unsigned long size, unsigned long nr_cpus,
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unsigned long *per_cpu_base, u32 hyp_va_bits);
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void __noreturn __host_enter(struct kvm_cpu_context *host_ctxt);
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#endif
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extern u64 kvm_nvhe_sym(id_aa64pfr0_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64pfr1_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64isar0_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64isar1_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64isar2_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64mmfr0_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64mmfr1_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64mmfr2_el1_sys_val);
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extern u64 kvm_nvhe_sym(id_aa64smfr0_el1_sys_val);
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extern unsigned long kvm_nvhe_sym(__icache_flags);
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extern unsigned int kvm_nvhe_sym(kvm_arm_vmid_bits);
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extern unsigned int kvm_nvhe_sym(kvm_host_sve_max_vl);
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#endif /* __ARM64_KVM_HYP_H__ */
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