Tudor Ambarus c452d49849 mtd: spi-nor: s/addr_width/addr_nbytes ... Address width was an unfortunate name, as it means the number of IO lines used for the address, whereas in the code it is used as the number of address bytes. s/addr_width/addr_nbytes throughout the entire SPI NOR framework. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Michael Walle <michael@walle.cc> Acked-by: Pratyush Yadav <p.yadav@ti.com> Link: https://lore.kernel.org/r/20220725092505.446315-2-tudor.ambarus@microchip.com		2022-07-28 05:11:56 +03:00
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bbm.h
blktrans.h
cfi_endian.h
cfi.h	mtd: cfi_cmdset_0002: Use chip_ready() for write on S29GL064N	2022-04-28 10:17:10 +02:00
concat.h
doc2000.h
flashchip.h
ftl.h
gen_probe.h
hyperbus.h
inftl.h
jedec.h
lpc32xx_mlc.h
lpc32xx_slc.h
map.h
mtd.h	mtd: fix 'part' field data corruption in mtd_info	2022-04-21 09:29:05 +02:00
mtdram.h
nand-ecc-mtk.h	mtd: nand: make mtk_ecc.c a separated module	2022-04-27 18:12:35 +02:00
nand-ecc-mxic.h	spi: mxic: Add support for pipelined ECC operations	2022-02-10 09:32:30 +01:00
nand-ecc-sw-bch.h
nand-ecc-sw-hamming.h
nand-gpio.h
nand.h	spi: mxic: Add support for pipelined ECC operations	2022-02-10 09:32:30 +01:00
ndfc.h
nftl.h
onenand_regs.h
onenand.h
onfi.h
partitions.h
pfow.h
physmap.h
pismo.h
plat-ram.h
platnand.h
qinfo.h
rawnand.h	mtd: rawnand: protect access to rawnand devices while in suspend	2022-02-09 09:30:21 +01:00
sh_flctl.h
sharpsl.h
spear_smi.h
spi-nor.h	mtd: spi-nor: s/addr_width/addr_nbytes	2022-07-28 05:11:56 +03:00
spinand.h	mtd: spinand: Add support for XTX XT26G0xA	2022-04-21 09:34:12 +02:00
super.h
ubi.h
xip.h