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5214cae77c
Here is the quote from [1]:
The unit-address must match the first address specified
in the reg property of the node. If the node has no reg property,
the @ and unit-address must be omitted and the node-name alone
differentiates the node from other nodes at the same level
This patch adjusts MIPS dts-files and devicetree binding
documentation in accordance with [1].
[1] Power.org(tm) Standard for Embedded Power Architecture(tm)
Platform Requirements (ePAPR). Version 1.1 – 08 April 2011.
Chapter 2.2.1.1 Node Name Requirements
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13345/
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
83 lines
1.6 KiB
Plaintext
83 lines
1.6 KiB
Plaintext
#include <dt-bindings/clock/jz4740-cgu.h>
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ingenic,jz4740";
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cpuintc: interrupt-controller {
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#address-cells = <0>;
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#interrupt-cells = <1>;
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interrupt-controller;
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compatible = "mti,cpu-interrupt-controller";
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};
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intc: interrupt-controller@10001000 {
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compatible = "ingenic,jz4740-intc";
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reg = <0x10001000 0x14>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <2>;
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};
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ext: ext {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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};
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rtc: rtc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <32768>;
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};
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cgu: jz4740-cgu@10000000 {
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compatible = "ingenic,jz4740-cgu";
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reg = <0x10000000 0x100>;
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clocks = <&ext>, <&rtc>;
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clock-names = "ext", "rtc";
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#clock-cells = <1>;
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};
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uart0: serial@10030000 {
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compatible = "ingenic,jz4740-uart";
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reg = <0x10030000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <9>;
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clocks = <&ext>, <&cgu JZ4740_CLK_UART0>;
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clock-names = "baud", "module";
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};
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uart1: serial@10031000 {
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compatible = "ingenic,jz4740-uart";
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reg = <0x10031000 0x100>;
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interrupt-parent = <&intc>;
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interrupts = <8>;
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clocks = <&ext>, <&cgu JZ4740_CLK_UART1>;
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clock-names = "baud", "module";
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};
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uhc: uhc@13030000 {
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compatible = "ingenic,jz4740-ohci", "generic-ohci";
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reg = <0x13030000 0x1000>;
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clocks = <&cgu JZ4740_CLK_UHC>;
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assigned-clocks = <&cgu JZ4740_CLK_UHC>;
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assigned-clock-rates = <48000000>;
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interrupt-parent = <&intc>;
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interrupts = <3>;
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status = "disabled";
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};
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};
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