Evan Green c0baf32103 RISC-V: hwprobe: Expose Zba, Zbb, and Zbs ... Add two new bits to the IMA_EXT_0 key for ZBA, ZBB, and ZBS extensions. These are accurately reported per CPU. Signed-off-by: Evan Green <evan@rivosinc.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Heiko Stuebner <heiko.stuebner@vrull.eu> Link: https://lore.kernel.org/r/20230509182504.2997252-4-evan@rivosinc.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>		2023-06-19 09:53:10 -07:00
..
boot-image-header.rst	RISC-V: Typo fixes in image header and documentation.	2019-12-19 09:32:45 -07:00
features.rst	docs: archis: add a per-architecture features list	2020-12-03 15:10:15 -07:00
hwprobe.rst	RISC-V: hwprobe: Expose Zba, Zbb, and Zbs	2023-06-19 09:53:10 -07:00
index.rst	RISC-V: Add a syscall for HW probing	2023-04-18 15:48:14 -07:00
patch-acceptance.rst	Documentation: RISC-V: patch-acceptance: s/implementor/implementer	2022-12-13 09:38:28 -08:00
uabi.rst	Documentation: riscv: fix insufficient list item indent	2023-02-14 16:00:02 -08:00
vm-layout.rst	riscv: Move early dtb mapping into the fixmap region	2023-04-13 18:14:26 -07:00