Dillon Varone c09e37fe66 drm/amd/display: Update soc bounding box for dcn32/dcn321 ... [Description] New values for soc bounding box and dummy pstate. Reviewed-by: Jun Lei <Jun.Lei@amd.com> Acked-by: Brian Chang <Brian.Chang@amd.com> Signed-off-by: Dillon Varone <Dillon.Varone@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2022-11-23 09:47:13 -05:00
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amdgpu_dm	drm/amd/display: No display after resume from WB/CB	2022-11-23 09:47:13 -05:00
dc	drm/amd/display: Update soc bounding box for dcn32/dcn321	2022-11-23 09:47:13 -05:00
dmub	drm/amd/display: Add margin on DRR vblank start for subvp	2022-11-23 09:47:13 -05:00
include	drm/amd/display: Refactor LTTPR mode selection	2022-09-29 09:41:46 -04:00
modules	drm/amd/display: new ABM config 2	2022-11-23 09:47:13 -05:00
Kconfig	drm/amd/display: add DCN support for ARM64	2022-11-04 16:05:54 -04:00
Makefile
TODO