Stephen Warren b02b07adb1 PCI: tegra: set up PADS_REFCLK_CFG1 ... The registers PADS_REFCLK_CFG are an array of 16-bit data, one entry per PCIe root port. For Tegra30, we therefore need to write a 3rd entry in this array. Doing so makes the mini-PCIe slot on Beaver operate correctly. While we're at it, add some #defines to partially document the fields within these 16-bit values. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>		2013-08-13 12:07:50 -06:00
..
Kconfig	PCI: tegra: Move PCIe driver to drivers/pci/host	2013-08-13 12:07:45 -06:00
Makefile	PCI: tegra: Move PCIe driver to drivers/pci/host	2013-08-13 12:07:45 -06:00
pci-mvebu.c	mvebu pcie driver (bridge) for v3.11	2013-05-31 23:20:52 -07:00
pci-tegra.c	PCI: tegra: set up PADS_REFCLK_CFG1	2013-08-13 12:07:50 -06:00
pcie-designware.c	pci: Add PCIe driver for Samsung Exynos	2013-06-26 20:14:59 +02:00