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There are some flashes to use bit 6 of status register for Top/Bottom (TB). Use top/bottom bit variable instead of fixed value and support this case. Set the Top/Bottom (TB) mask based on SPI_NOR_TB_SR_BIT6 flash_info flag. We can't use a bigger granularity, for example to set TB_BIT6 per manufacturer using a SNOR_F flag. The manufacturers don't have a common rule in regards to the TB bit: Winbond : Use the 6th bit from 32MB capacity W25Q20EW, W25Q50BW, W25Q128V - TB(5) W25Q256JV, W25M512JV - TB(6) GigaDevice : Use the 6th bit from 32MB capacity GD25Q16C, GD25Q32C, GD25LQ32D, GD25Q64C, GD25Q128 - TB(5) GD25Q256 - TB(6) Micron/STM : Keep to use 5th bit M25PX64, N25Q128A, N25Q512A, MT25QL512ABB, MT25QL02GCBB - TB(5) Spansion : Use the 6th bit from 16MB capacity S25FL116K, S25FL132K, S25FL165K - TB(5) S25FL128L, S25FL256L - TB(6) We can't make a correlation between TB and BP3 either, i.e. assume that if BP3 is defined then TB will be at BIT(6). Micron breaks this rule. Signed-off-by: Jungseung Lee <js07.lee@samsung.com> [tudor.ambarus@microchip.com: describe the reason for setting a new flash_info flag.] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> |
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| .. | ||
| bbm.h | ||
| blktrans.h | ||
| cfi_endian.h | ||
| cfi.h | ||
| concat.h | ||
| doc2000.h | ||
| flashchip.h | ||
| ftl.h | ||
| gen_probe.h | ||
| hyperbus.h | ||
| inftl.h | ||
| jedec.h | ||
| latch-addr-flash.h | ||
| lpc32xx_mlc.h | ||
| lpc32xx_slc.h | ||
| map.h | ||
| mtd.h | ||
| mtdram.h | ||
| nand_bch.h | ||
| nand_ecc.h | ||
| nand-gpio.h | ||
| nand.h | ||
| ndfc.h | ||
| nftl.h | ||
| onenand_regs.h | ||
| onenand.h | ||
| onfi.h | ||
| partitions.h | ||
| pfow.h | ||
| physmap.h | ||
| pismo.h | ||
| plat-ram.h | ||
| platnand.h | ||
| qinfo.h | ||
| rawnand.h | ||
| sh_flctl.h | ||
| sharpsl.h | ||
| spear_smi.h | ||
| spi-nor.h | ||
| spinand.h | ||
| super.h | ||
| ubi.h | ||
| xip.h | ||