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a7b3a470fd
The cache information can be extracted from either a Device Tree(DT), the PPTT ACPI table, or arch registers (clidr_el1 for arm64). When the DT is used but no cache properties are advertised, the current code doesn't correctly fallback to using arch information. The changes fixes the same and also assuse the that L1 data/instruction caches are private and L2/higher caches are shared when the cache information is missing in DT/ACPI and is derived form clidr_el1/arch registers. Currently the cacheinfo is built from the primary CPU prior to secondary CPUs boot, if the DT/ACPI description contains cache information. However, if not present, it still reverts to the old behavior, which allocates the cacheinfo memory on each secondary CPUs which causes RT kernels to triggers a "BUG: sleeping function called from invalid context". The changes here attempts to enable automatic detection for RT kernels when no DT/ACPI cache information is available, by pre-allocating cacheinfo memory on the primary CPU. -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmQ9bmEACgkQAEG6vDF+ 4pggDhAAo75vFky/U63PV9x4IMvVTkNGIK/DSihvG+s5GsujiSS78f4tSSpLAY1X yWTEYsU+1q03cE8rv0Xmkw+cxLerjOGisvPZCdnKVljUF5TWez6OlwKw5V1QqWk9 faOmWBSb8fH4X0ys73e0SBsF3bzyJB/cORmbOL8OnCE7rGkyMQ0plhYVOBQ3CoV8 KMrw7rnPlc5Aoq/8LgTY+Gojqf82njacCIQPrn1TjS/V0SdobC8xm7ZoepZgG9Q1 MHzBtTmKzGrVxWawxcfTaE89t2rudAafa3noYr4xy+dI8ptSkTQNKCG9pvTxIcFo KXKfBO6+hTWNREf7a4ginKdKcIKDD7Oo2oTnPBYr9O9/2r727c5Wa5FEGsXa4c14 0dN3vFbhwWIDc5sA7eBOCDYycJm6XyTGJ6iPR+fmaWKwgXhIM2WxakeO8aptuwhn sV+XO7IJxSF79GrrAkSN6AtVj6NHvNpzwRx9mBwHkT3ajDGb04P23AOuqoNDt7kh wcz217ng3hG4CDEbOk9JCQqtFhJeSuIWP5T3wofUfYeXy2opQhwzmiOL+NVROuGY h/cwQCcXCEYUohJhln2PvbMS7w0bBNserpetzEFJfc5aLLdocaH3aQ/AFnCXmCdN YPXP6bp0WdbmfcMskVY8vlb/TBlcOzu6+W0qB1dXTWuib7cwm3o= =4hhJ -----END PGP SIGNATURE----- Merge tag 'cacheinfo-updates-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into driver-core-next Sudeep writes: cacheinfo and arch_topology updates for v6.4 The cache information can be extracted from either a Device Tree(DT), the PPTT ACPI table, or arch registers (clidr_el1 for arm64). When the DT is used but no cache properties are advertised, the current code doesn't correctly fallback to using arch information. The changes fixes the same and also assuse the that L1 data/instruction caches are private and L2/higher caches are shared when the cache information is missing in DT/ACPI and is derived form clidr_el1/arch registers. Currently the cacheinfo is built from the primary CPU prior to secondary CPUs boot, if the DT/ACPI description contains cache information. However, if not present, it still reverts to the old behavior, which allocates the cacheinfo memory on each secondary CPUs which causes RT kernels to triggers a "BUG: sleeping function called from invalid context". The changes here attempts to enable automatic detection for RT kernels when no DT/ACPI cache information is available, by pre-allocating cacheinfo memory on the primary CPU. * tag 'cacheinfo-updates-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: cacheinfo: Add use_arch[|_cache]_info field/function arch_topology: Remove early cacheinfo error message if -ENOENT cacheinfo: Check cache properties are present in DT cacheinfo: Check sib_leaf in cache_leaves_are_shared() cacheinfo: Allow early level detection when DT/ACPI info is missing/broken cacheinfo: Add arm64 early level initializer implementation cacheinfo: Add arch specific early level initializer |
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| .. | ||
| pi | ||
| probes | ||
| vdso | ||
| vdso32 | ||
| .gitignore | ||
| acpi_numa.c | ||
| acpi_parking_protocol.c | ||
| acpi.c | ||
| alternative.c | ||
| armv8_deprecated.c | ||
| asm-offsets.c | ||
| cacheinfo.c | ||
| compat_alignment.c | ||
| cpu_errata.c | ||
| cpu_ops.c | ||
| cpu-reset.S | ||
| cpufeature.c | ||
| cpuidle.c | ||
| cpuinfo.c | ||
| crash_core.c | ||
| crash_dump.c | ||
| debug-monitors.c | ||
| efi-header.S | ||
| efi-rt-wrapper.S | ||
| efi.c | ||
| elfcore.c | ||
| entry-common.c | ||
| entry-fpsimd.S | ||
| entry-ftrace.S | ||
| entry.S | ||
| fpsimd.c | ||
| ftrace.c | ||
| head.S | ||
| hibernate-asm.S | ||
| hibernate.c | ||
| hw_breakpoint.c | ||
| hyp-stub.S | ||
| idle.c | ||
| idreg-override.c | ||
| image-vars.h | ||
| image.h | ||
| io.c | ||
| irq.c | ||
| jump_label.c | ||
| kaslr.c | ||
| kexec_image.c | ||
| kgdb.c | ||
| kuser32.S | ||
| machine_kexec_file.c | ||
| machine_kexec.c | ||
| Makefile | ||
| module-plts.c | ||
| module.c | ||
| mte.c | ||
| paravirt.c | ||
| patch-scs.c | ||
| patching.c | ||
| pci.c | ||
| perf_callchain.c | ||
| perf_event.c | ||
| perf_regs.c | ||
| pointer_auth.c | ||
| process.c | ||
| proton-pack.c | ||
| psci.c | ||
| ptrace.c | ||
| reloc_test_core.c | ||
| reloc_test_syms.S | ||
| relocate_kernel.S | ||
| return_address.c | ||
| sdei.c | ||
| setup.c | ||
| signal32.c | ||
| signal.c | ||
| sigreturn32.S | ||
| sleep.S | ||
| smccc-call.S | ||
| smp_spin_table.c | ||
| smp.c | ||
| stacktrace.c | ||
| suspend.c | ||
| sys32.c | ||
| sys_compat.c | ||
| sys.c | ||
| syscall.c | ||
| time.c | ||
| topology.c | ||
| trace-events-emulation.h | ||
| traps.c | ||
| vdso32-wrap.S | ||
| vdso-wrap.S | ||
| vdso.c | ||
| vmlinux.lds.S | ||