Pierre-Louis Bossart a50477e55f ASoC: Intel: cht_bsw_rt5645: add Baytrail MCLK support ... The existing code assumes a 19.2 MHz MCLK as the default hardware configuration. This is valid for CherryTrail but not for Baytrail. Add explicit MCLK configuration to set the 19.2 clock on/off depending on DAPM events. This is a prerequisite step to enable devices with Baytrail and RT5645 such as Asus X205TA Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>		2017-01-31 20:03:56 +00:00
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atom	Merge branch 'fix/intel' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into asoc-intel	2017-01-31 20:03:10 +00:00
baytrail	ASoC: intel: Replace kthread with work	2016-11-30 17:41:13 +00:00
boards	ASoC: Intel: cht_bsw_rt5645: add Baytrail MCLK support	2017-01-31 20:03:56 +00:00
common	ASoC: Intel: Common: Update dsp register poll implementation	2017-01-06 18:14:45 +00:00
haswell	ASoC: intel: Replace kthread with work	2016-11-30 17:41:13 +00:00
skylake	ASoC: Intel: Skylake: Use set_tdm_slot to set the dma channel	2017-01-24 17:55:16 +00:00
Kconfig	ASoC: Intel: remove ignored dependencies	2017-01-17 17:46:58 +00:00
Makefile	ASoC: Intel: rename SND_SST_MFLD_PLATFORM to SND_SST_ATOM_HIFI2_PLATFORM	2017-01-17 17:46:40 +00:00