Aric Cyr a49f6727e1 drm/amd/display: Fix incorrect backlight register offset for DCN ... [Why] Typo in backlight refactor inctroduced wrong register offset. [How] Change DCE to DCN register map for PWRSEQ_REF_DIV Cc: stable@vger.kernel.org Signed-off-by: Aric Cyr <aric.cyr@amd.com> Reviewed-by: Ashley Thomas <Ashley.Thomas2@amd.com> Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-08-10 18:08:36 -04:00
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drm	drm/amd/display: Fix incorrect backlight register offset for DCN	2020-08-10 18:08:36 -04:00
host1x	gpu: host1x: debug: Dump push buffer state	2020-07-17 16:06:14 +02:00
ipu-v3	gpu: ipu-v3: image-convert: Wait for all EOFs before completing a tile	2020-07-20 15:16:05 +02:00
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