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c96f8d3ca7
vdda1v1 and vdda1v8 supplies are required by USB PLL, not by the PHYs. Remove them from usbphyc child phy nodes now that they are managed in usbphyc parent node at SoC level. Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com> Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
162 lines
3.1 KiB
Plaintext
162 lines
3.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
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/*
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* Copyright (C) 2020 Marek Vasut <marex@denx.de>
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/pwm/pwm.h>
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/ {
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aliases {
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serial0 = &uart4;
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serial1 = &usart3;
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serial2 = &uart8;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&adc {
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status = "disabled";
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};
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&dac {
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status = "disabled";
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};
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&gpiob {
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/*
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* NOTE: On DRC02, the RS485_RX_En is controlled by a separate
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* GPIO line, however the STM32 UART driver assumes RX happens
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* during TX anyway and that it only controls drive enable DE
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* line. Hence, the RX is always enabled here.
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*/
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rs485-rx-en-hog {
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gpio-hog;
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gpios = <8 0>;
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output-low;
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line-name = "rs485-rx-en";
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};
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};
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&gpiod {
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gpio-line-names = "", "", "", "",
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"", "", "", "",
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"", "", "", "Out1",
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"Out2", "", "", "";
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};
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&gpioi {
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gpio-line-names = "In1", "", "", "",
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"", "", "", "",
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"In2", "", "", "",
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"", "", "", "";
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/*
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* NOTE: The USB Hub on the DRC02 needs a reset signal to be
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* pulled high in order to be detected by the USB Controller.
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* This signal should be handled by USB power sequencing in
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* order to reset the Hub when USB bus is powered down, but
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* so far there is no such functionality.
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*/
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usb-hub-hog {
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gpio-hog;
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gpios = <2 0>;
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output-high;
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line-name = "usb-hub-reset";
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "okay";
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eeprom@50 {
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compatible = "atmel,24c04";
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reg = <0x50>;
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pagesize = <16>;
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};
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};
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&i2c4 {
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touchscreen@49 {
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status = "disabled";
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};
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};
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&i2c5 { /* TP7/TP8 */
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pinctrl-names = "default";
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pinctrl-0 = <&i2c5_pins_a>;
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i2c-scl-rising-time-ns = <185>;
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i2c-scl-falling-time-ns = <20>;
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status = "okay";
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/* spare dmas for other usage */
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/delete-property/dmas;
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/delete-property/dma-names;
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};
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&sdmmc3 {
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/*
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* On DRC02, the SoM does not have SDIO WiFi. The pins
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* are used for on-board microSD slot instead.
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*/
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/delete-property/broken-cd;
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cd-gpios = <&gpioi 10 GPIO_ACTIVE_HIGH>;
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disable-wp;
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};
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&spi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins_a>;
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cs-gpios = <&gpioz 3 0>;
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/* Use PIO for the display */
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/delete-property/dmas;
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/delete-property/dma-names;
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status = "disabled"; /* Enable once there is display driver */
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/*
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* Note: PF3/GPIO_A , PD6/GPIO_B , PG0/GPIO_C , PC6/GPIO_E are
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* also connected to the display board connector.
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*/
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};
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&usart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&usart3_pins_a>;
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status = "okay";
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};
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/*
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* Note: PI3 is UART1_RTS and PI5 is UART1_CTS on DRC02 (uart4 of STM32MP1),
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* however the STM32MP1 pinmux cannot map them to UART4 .
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*/
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&uart8 { /* RS485 */
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linux,rs485-enabled-at-boot-time;
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pinctrl-names = "default";
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pinctrl-0 = <&uart8_pins_a>;
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rts-gpios = <&gpioe 6 GPIO_ACTIVE_HIGH>;
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status = "okay";
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};
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&usbh_ehci {
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phys = <&usbphyc_port0>;
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status = "okay";
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};
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&usbphyc {
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status = "okay";
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};
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&usbphyc_port0 {
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phy-supply = <&vdd_usb>;
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};
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