Conor Dooley e4009c5fa7 riscv: dts: microchip: mpfs: remove pci axi address translation property ... An AXI master address translation table property was inadvertently added to the device tree & this was not caught by dtbs_check at the time. Remove the property - it should not be in mpfs.dtsi anyway as it would be more suitable in -fabric.dtsi nor does it actually apply to the version of the reference design we are using for upstream. Link: https://www.microsemi.com/document-portal/doc_download/1245812-polarfire-fpga-and-polarfire-soc-fpga-pci-express-user-guide # Section 1.3.3 Fixes: 528a5b1f25 ("riscv: dts: microchip: add new peripherals to icicle kit device tree") Signed-off-by: Conor Dooley <conor.dooley@microchip.com>		2022-08-23 22:15:55 +01:00
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canaan	RISC-V: Canaan devicetree fixes	2022-08-10 14:43:14 -07:00
microchip	riscv: dts: microchip: mpfs: remove pci axi address translation property	2022-08-23 22:15:55 +01:00
sifive	riscv: dts: sifive unmatched: Add PWM controlled LEDs	2022-08-11 11:34:57 -07:00
starfive	riscv: dts: starfive: correct number of external interrupts	2022-08-11 11:40:37 -07:00
Makefile	RISC-V: Add BeagleV Starlight Beta device tree	2021-12-16 17:24:23 +01:00