mirror of
https://git.proxmox.com/git/mirror_ubuntu-kernels.git
synced 2025-11-18 21:29:44 +00:00
* dt-bindings: Drop unneeded quotes
* mtdblock: Tolerate corrected bit-flips
* Use of_property_read_bool() for boolean properties
* Avoid magic values
* Avoid printing error messages on probe deferrals
* Prepare mtd_otp_nvmem_add() to handle -EPROBE_DEFER
* Fix error path for nvmem provider
* Fix nvmem error reporting
* Provide unique name for nvmem device
MTD device changes:
* lpddr_cmds: Remove unused words variable
* bcm63xxpart: Remove MODULE_LICENSE in non-modules
SPI NOR core changes:
* Introduce Read While Write support for flashes featuring several banks
* Set the 4-Byte Address Mode method based on SFDP data
* Allow post_sfdp hook to return errors
* Parse SCCR MC table and introduce support for multi-chip devices
SPI NOR manufacturer drivers changes:
* macronix: Add support for mx25uw51245g with RWW
* spansion:
- Determine current address mode at runtime as it can be changed in a
non-volatile way and differ from factory defaults or from what SFDP
advertises.
- Enable JFFS2 write buffer mode for few ECC'd NOR flashes: S25FS256T,
s25hx and s28hx
- Add support for s25hl02gt and s25hs02gt
Raw NAND core changes:
* Convert to platform remove callback returning void
* Fix spelling mistake waifunc() -> waitfunc()
Raw NAND controller driver changes:
* imx: Remove unused is_imx51_nfc and imx53_nfc functions
* omap2: Drop obsolete dependency on COMPILE_TEST
* orion: Use devm_platform_ioremap_resource()
* qcom:
- Use of_property_present() for testing DT property presence
- Use devm_platform_get_and_ioremap_resource()
* stm32_fmc2: Depends on ARCH_STM32 instead of MACH_STM32MP157
* tmio: Remove reference to config MTD_NAND_TMIO in the parsers
Raw NAND manufacturer driver changes:
* hynix: Fix up bit 0 of sdr_timing_mode
SPI-NAND changes:
* Add support for ESMT F50x1G41LB
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Merge tag 'mtd/for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull mtd updates from Miquel Raynal:
"Core MTD changes:
- dt-bindings: Drop unneeded quotes
- mtdblock: Tolerate corrected bit-flips
- Use of_property_read_bool() for boolean properties
- Avoid magic values
- Avoid printing error messages on probe deferrals
- Prepare mtd_otp_nvmem_add() to handle -EPROBE_DEFER
- Fix error path for nvmem provider
- Fix nvmem error reporting
- Provide unique name for nvmem device
MTD device changes:
- lpddr_cmds: Remove unused words variable
- bcm63xxpart: Remove MODULE_LICENSE in non-modules
SPI NOR core changes:
- Introduce Read While Write support for flashes featuring several
banks
- Set the 4-Byte Address Mode method based on SFDP data
- Allow post_sfdp hook to return errors
- Parse SCCR MC table and introduce support for multi-chip devices
SPI NOR manufacturer drivers changes:
- macronix: Add support for mx25uw51245g with RWW
- spansion:
- Determine current address mode at runtime as it can be changed
in a non-volatile way and differ from factory defaults or from
what SFDP advertises.
- Enable JFFS2 write buffer mode for few ECC'd NOR flashes:
S25FS256T, s25hx and s28hx
- Add support for s25hl02gt and s25hs02gt
Raw NAND core changes:
- Convert to platform remove callback returning void
- Fix spelling mistake waifunc() -> waitfunc()
Raw NAND controller driver changes:
- imx: Remove unused is_imx51_nfc and imx53_nfc functions
- omap2: Drop obsolete dependency on COMPILE_TEST
- orion: Use devm_platform_ioremap_resource()
- qcom:
- Use of_property_present() for testing DT property presence
- Use devm_platform_get_and_ioremap_resource()
- stm32_fmc2: Depends on ARCH_STM32 instead of MACH_STM32MP157
- tmio: Remove reference to config MTD_NAND_TMIO in the parsers
Raw NAND manufacturer driver changes:
- hynix: Fix up bit 0 of sdr_timing_mode
SPI-NAND changes:
- Add support for ESMT F50x1G41LB"
* tag 'mtd/for-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (55 commits)
mtd: nand: Convert to platform remove callback returning void
mtd: onenand: omap2: Drop obsolete dependency on COMPILE_TEST
mtd: spi-nor: spansion: Add support for s25hl02gt and s25hs02gt
mtd: spi-nor: spansion: Add a new ->ready() hook for multi-chip device
mtd: spi-nor: spansion: Rework cypress_nor_quad_enable_volatile() for multi-chip device support
mtd: spi-nor: spansion: Rework cypress_nor_get_page_size() for multi-chip device support
mtd: spi-nor: sfdp: Add support for SCCR map for multi-chip device
mtd: spi-nor: Extract volatile register offset from SCCR map
mtd: spi-nor: Allow post_sfdp hook to return errors
mtd: spi-nor: spansion: Rename method to cypress_nor_get_page_size
mtd: spi-nor: spansion: Enable JFFS2 write buffer for S25FS256T
mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s25hx SEMPER flash
mtd: spi-nor: spansion: Enable JFFS2 write buffer for Infineon s28hx SEMPER flash
mtd: spi-nor: spansion: Determine current address mode
mtd: spi-nor: core: Introduce spi_nor_set_4byte_addr_mode()
mtd: spi-nor: core: Update flash's current address mode when changing address mode
mtd: spi-nor: Stop exporting spi_nor_restore()
mtd: spi-nor: Set the 4-Byte Address Mode method based on SFDP data
mtd: spi-nor: core: Make spi_nor_set_4byte_addr_mode_brwr public
mtd: spi-nor: core: Update name and description of spi_nor_set_4byte_addr_mode
...
257 lines
6.9 KiB
C
257 lines
6.9 KiB
C
// SPDX-License-Identifier: GPL-2.0
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#include <linux/debugfs.h>
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#include <linux/mtd/spi-nor.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi-mem.h>
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#include "core.h"
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#define SPI_NOR_DEBUGFS_ROOT "spi-nor"
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#define SNOR_F_NAME(name) [ilog2(SNOR_F_##name)] = #name
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static const char *const snor_f_names[] = {
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SNOR_F_NAME(HAS_SR_TB),
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SNOR_F_NAME(NO_OP_CHIP_ERASE),
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SNOR_F_NAME(BROKEN_RESET),
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SNOR_F_NAME(4B_OPCODES),
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SNOR_F_NAME(HAS_4BAIT),
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SNOR_F_NAME(HAS_LOCK),
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SNOR_F_NAME(HAS_16BIT_SR),
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SNOR_F_NAME(NO_READ_CR),
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SNOR_F_NAME(HAS_SR_TB_BIT6),
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SNOR_F_NAME(HAS_4BIT_BP),
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SNOR_F_NAME(HAS_SR_BP3_BIT6),
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SNOR_F_NAME(IO_MODE_EN_VOLATILE),
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SNOR_F_NAME(SOFT_RESET),
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SNOR_F_NAME(SWP_IS_VOLATILE),
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SNOR_F_NAME(RWW),
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SNOR_F_NAME(ECC),
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};
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#undef SNOR_F_NAME
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static const char *spi_nor_protocol_name(enum spi_nor_protocol proto)
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{
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switch (proto) {
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case SNOR_PROTO_1_1_1: return "1S-1S-1S";
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case SNOR_PROTO_1_1_2: return "1S-1S-2S";
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case SNOR_PROTO_1_1_4: return "1S-1S-4S";
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case SNOR_PROTO_1_1_8: return "1S-1S-8S";
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case SNOR_PROTO_1_2_2: return "1S-2S-2S";
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case SNOR_PROTO_1_4_4: return "1S-4S-4S";
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case SNOR_PROTO_1_8_8: return "1S-8S-8S";
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case SNOR_PROTO_2_2_2: return "2S-2S-2S";
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case SNOR_PROTO_4_4_4: return "4S-4S-4S";
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case SNOR_PROTO_8_8_8: return "8S-8S-8S";
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case SNOR_PROTO_1_1_1_DTR: return "1D-1D-1D";
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case SNOR_PROTO_1_2_2_DTR: return "1D-2D-2D";
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case SNOR_PROTO_1_4_4_DTR: return "1D-4D-4D";
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case SNOR_PROTO_1_8_8_DTR: return "1D-8D-8D";
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case SNOR_PROTO_8_8_8_DTR: return "8D-8D-8D";
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}
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return "<unknown>";
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}
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static void spi_nor_print_flags(struct seq_file *s, unsigned long flags,
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const char *const *names, int names_len)
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{
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bool sep = false;
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int i;
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for (i = 0; i < sizeof(flags) * BITS_PER_BYTE; i++) {
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if (!(flags & BIT(i)))
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continue;
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if (sep)
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seq_puts(s, " | ");
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sep = true;
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if (i < names_len && names[i])
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seq_puts(s, names[i]);
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else
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seq_printf(s, "1<<%d", i);
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}
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}
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static int spi_nor_params_show(struct seq_file *s, void *data)
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{
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struct spi_nor *nor = s->private;
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struct spi_nor_flash_parameter *params = nor->params;
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struct spi_nor_erase_map *erase_map = ¶ms->erase_map;
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struct spi_nor_erase_region *region;
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const struct flash_info *info = nor->info;
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char buf[16], *str;
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int i;
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seq_printf(s, "name\t\t%s\n", info->name);
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seq_printf(s, "id\t\t%*ph\n", SPI_NOR_MAX_ID_LEN, nor->id);
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string_get_size(params->size, 1, STRING_UNITS_2, buf, sizeof(buf));
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seq_printf(s, "size\t\t%s\n", buf);
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seq_printf(s, "write size\t%u\n", params->writesize);
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seq_printf(s, "page size\t%u\n", params->page_size);
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seq_printf(s, "address nbytes\t%u\n", nor->addr_nbytes);
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seq_puts(s, "flags\t\t");
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spi_nor_print_flags(s, nor->flags, snor_f_names, sizeof(snor_f_names));
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seq_puts(s, "\n");
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seq_puts(s, "\nopcodes\n");
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seq_printf(s, " read\t\t0x%02x\n", nor->read_opcode);
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seq_printf(s, " dummy cycles\t%u\n", nor->read_dummy);
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seq_printf(s, " erase\t\t0x%02x\n", nor->erase_opcode);
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seq_printf(s, " program\t0x%02x\n", nor->program_opcode);
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switch (nor->cmd_ext_type) {
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case SPI_NOR_EXT_NONE:
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str = "none";
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break;
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case SPI_NOR_EXT_REPEAT:
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str = "repeat";
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break;
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case SPI_NOR_EXT_INVERT:
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str = "invert";
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break;
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default:
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str = "<unknown>";
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break;
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}
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seq_printf(s, " 8D extension\t%s\n", str);
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seq_puts(s, "\nprotocols\n");
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seq_printf(s, " read\t\t%s\n",
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spi_nor_protocol_name(nor->read_proto));
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seq_printf(s, " write\t\t%s\n",
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spi_nor_protocol_name(nor->write_proto));
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seq_printf(s, " register\t%s\n",
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spi_nor_protocol_name(nor->reg_proto));
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seq_puts(s, "\nerase commands\n");
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for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
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struct spi_nor_erase_type *et = &erase_map->erase_type[i];
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if (et->size) {
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string_get_size(et->size, 1, STRING_UNITS_2, buf,
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sizeof(buf));
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seq_printf(s, " %02x (%s) [%d]\n", et->opcode, buf, i);
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}
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}
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if (!(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) {
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string_get_size(params->size, 1, STRING_UNITS_2, buf, sizeof(buf));
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seq_printf(s, " %02x (%s)\n", SPINOR_OP_CHIP_ERASE, buf);
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}
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seq_puts(s, "\nsector map\n");
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seq_puts(s, " region (in hex) | erase mask | flags\n");
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seq_puts(s, " ------------------+------------+----------\n");
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for (region = erase_map->regions;
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region;
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region = spi_nor_region_next(region)) {
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u64 start = region->offset & ~SNOR_ERASE_FLAGS_MASK;
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u64 flags = region->offset & SNOR_ERASE_FLAGS_MASK;
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u64 end = start + region->size - 1;
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seq_printf(s, " %08llx-%08llx | [%c%c%c%c] | %s\n",
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start, end,
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flags & BIT(0) ? '0' : ' ',
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flags & BIT(1) ? '1' : ' ',
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flags & BIT(2) ? '2' : ' ',
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flags & BIT(3) ? '3' : ' ',
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flags & SNOR_OVERLAID_REGION ? "overlaid" : "");
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}
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(spi_nor_params);
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static void spi_nor_print_read_cmd(struct seq_file *s, u32 cap,
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struct spi_nor_read_command *cmd)
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{
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seq_printf(s, " %s%s\n", spi_nor_protocol_name(cmd->proto),
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cap == SNOR_HWCAPS_READ_FAST ? " (fast read)" : "");
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seq_printf(s, " opcode\t0x%02x\n", cmd->opcode);
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seq_printf(s, " mode cycles\t%u\n", cmd->num_mode_clocks);
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seq_printf(s, " dummy cycles\t%u\n", cmd->num_wait_states);
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}
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static void spi_nor_print_pp_cmd(struct seq_file *s,
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struct spi_nor_pp_command *cmd)
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{
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seq_printf(s, " %s\n", spi_nor_protocol_name(cmd->proto));
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seq_printf(s, " opcode\t0x%02x\n", cmd->opcode);
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}
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static int spi_nor_capabilities_show(struct seq_file *s, void *data)
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{
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struct spi_nor *nor = s->private;
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struct spi_nor_flash_parameter *params = nor->params;
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u32 hwcaps = params->hwcaps.mask;
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int i, cmd;
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seq_puts(s, "Supported read modes by the flash\n");
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for (i = 0; i < sizeof(hwcaps) * BITS_PER_BYTE; i++) {
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if (!(hwcaps & BIT(i)))
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continue;
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cmd = spi_nor_hwcaps_read2cmd(BIT(i));
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if (cmd < 0)
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continue;
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spi_nor_print_read_cmd(s, BIT(i), ¶ms->reads[cmd]);
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hwcaps &= ~BIT(i);
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}
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seq_puts(s, "\nSupported page program modes by the flash\n");
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for (i = 0; i < sizeof(hwcaps) * BITS_PER_BYTE; i++) {
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if (!(hwcaps & BIT(i)))
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continue;
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cmd = spi_nor_hwcaps_pp2cmd(BIT(i));
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if (cmd < 0)
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continue;
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spi_nor_print_pp_cmd(s, ¶ms->page_programs[cmd]);
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hwcaps &= ~BIT(i);
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}
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if (hwcaps)
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seq_printf(s, "\nunknown hwcaps 0x%x\n", hwcaps);
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return 0;
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}
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DEFINE_SHOW_ATTRIBUTE(spi_nor_capabilities);
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static void spi_nor_debugfs_unregister(void *data)
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{
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struct spi_nor *nor = data;
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debugfs_remove(nor->debugfs_root);
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nor->debugfs_root = NULL;
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}
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static struct dentry *rootdir;
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void spi_nor_debugfs_register(struct spi_nor *nor)
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{
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struct dentry *d;
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int ret;
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if (!rootdir)
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rootdir = debugfs_create_dir(SPI_NOR_DEBUGFS_ROOT, NULL);
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ret = devm_add_action(nor->dev, spi_nor_debugfs_unregister, nor);
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if (ret)
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return;
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d = debugfs_create_dir(dev_name(nor->dev), rootdir);
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nor->debugfs_root = d;
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debugfs_create_file("params", 0444, d, nor, &spi_nor_params_fops);
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debugfs_create_file("capabilities", 0444, d, nor,
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&spi_nor_capabilities_fops);
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}
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void spi_nor_debugfs_shutdown(void)
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{
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debugfs_remove(rootdir);
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}
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