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The arm dts directory has grown to 1559 boards which makes it a bit unwieldy to maintain and use. Past attempts stalled out due to plans to move .dts files out of the kernel tree. Doing that is no longer planned (any time soon at least), so let's go ahead and group .dts files by vendors. This move aligns arm with arm64 .dts file structure. There's no change to dtbs_install as the flat structure is maintained on install. The naming of vendor directories is roughly in this order of preference: - Matching original and current SoC vendor prefix/name (e.g. ti, qcom) - Current vendor prefix/name if still actively sold (SoCs which have been aquired) (e.g. nxp/imx) - Existing platform name for older platforms not sold/maintained by any company (e.g. gemini, nspire) The whole move was scripted with the exception of MAINTAINERS and a few makefile fixups. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Paul Barker <paul.barker@sancloud.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Nick Hawkins <nick.hawkins@hpe.com> Acked-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com> Acked-by: Peter Rosin <peda@axentia.se> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com> Acked-by: Sudeep Holla <sudeep.holla@arm.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom Acked-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Patrice Chotard <patrice.chotard@foss.st.com> Acked-by: Romain Perier <romain.perier@gmail.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com> Signed-off-by: Rob Herring <robh@kernel.org>
287 lines
5.8 KiB
Plaintext
287 lines
5.8 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0
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/*
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* Device Tree file for ITian Square One SQ201 NAS
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*/
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/dts-v1/;
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#include "gemini.dtsi"
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#include <dt-bindings/input/input.h>
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/ {
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model = "ITian Square One SQ201";
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compatible = "itian,sq201", "cortina,gemini";
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#address-cells = <1>;
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#size-cells = <1>;
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memory@0 { /* 128 MB */
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device_type = "memory";
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reg = <0x00000000 0x8000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200n8 root=/dev/mtdblock2 rw rootfstype=squashfs,jffs2 rootwait";
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stdout-path = &uart0;
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};
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gpio_keys {
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compatible = "gpio-keys";
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button-setup {
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debounce-interval = <100>;
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wakeup-source;
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linux,code = <KEY_SETUP>;
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label = "factory reset";
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/* Conflict with NAND flash */
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gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led-green-info {
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label = "sq201:green:info";
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gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led-green-usb {
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label = "sq201:green:usb";
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gpios = <&gpio0 31 GPIO_ACTIVE_HIGH>;
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default-state = "off";
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linux,default-trigger = "usb-host";
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};
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};
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mdio0: mdio {
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compatible = "virtual,mdio-gpio";
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/* Uses MDC and MDIO */
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gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
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<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */
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#address-cells = <1>;
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#size-cells = <0>;
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/* This is a Marvell 88E1111 ethernet transciever */
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phy0: ethernet-phy@1 {
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reg = <1>;
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};
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};
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spi {
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compatible = "spi-gpio";
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#address-cells = <1>;
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#size-cells = <0>;
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/* Check pin collisions */
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sck-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
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miso-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
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mosi-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
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cs-gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>;
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num-chipselects = <1>;
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switch@0 {
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compatible = "vitesse,vsc7395";
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reg = <0>;
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/* Specified for 2.5 MHz or below */
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spi-max-frequency = <2500000>;
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gpio-controller;
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#gpio-cells = <2>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@1 {
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reg = <1>;
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label = "lan2";
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};
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port@2 {
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reg = <2>;
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label = "lan3";
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};
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port@3 {
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reg = <3>;
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label = "lan4";
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};
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vsc: port@6 {
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reg = <6>;
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label = "cpu";
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ethernet = <&gmac1>;
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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};
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};
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soc {
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flash@30000000 {
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status = "okay";
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pinctrl-names = "enabled", "disabled";
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pinctrl-0 = <&pflash_default_pins>;
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pinctrl-1 = <&pflash_disabled_pins>;
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/* 16MB of flash */
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reg = <0x30000000 0x01000000>;
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partitions {
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compatible = "redboot-fis";
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/* Eraseblock at 0xfe0000 */
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fis-index-block = <0x1fc>;
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};
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};
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syscon: syscon@40000000 {
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pinctrl {
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/*
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* gpio0fgrp cover line 18 used by reset button
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* gpio0ggrp cover line 20 used by info LED
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* gpio0hgrp cover line 21, 22 used by MDIO for Marvell PHY
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* gpio0kgrp cover line 31 used by USB LED
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*/
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gpio0_default_pins: pinctrl-gpio0 {
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mux {
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function = "gpio0";
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groups = "gpio0fgrp",
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"gpio0hgrp";
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};
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};
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/*
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* gpio0dgrp cover lines used by the SPI
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* to the Vitesse G5x chip.
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*/
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gpio1_default_pins: pinctrl-gpio1 {
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mux {
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function = "gpio1";
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groups = "gpio1dgrp";
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};
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};
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/*
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* These GPIO groups will be mapped in over some
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* of the flash pins when the flash is not in
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* active use.
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*/
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pflash_disabled_pins: pinctrl-pflash-disabled {
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mux {
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function = "gpio0";
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groups = "gpio0ggrp", "gpio0igrp", "gpio0jgrp",
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"gpio0kgrp";
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};
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};
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pinctrl-gmii {
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mux {
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function = "gmii";
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groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
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};
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/* Settings come from memory dump in PLATO */
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conf0 {
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pins = "V8 GMAC0 RXDV";
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skew-delay = <0>;
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};
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conf1 {
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pins = "Y7 GMAC0 RXC";
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skew-delay = <15>;
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};
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conf2 {
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pins = "T8 GMAC0 TXEN";
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skew-delay = <7>;
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};
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conf3 {
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pins = "U8 GMAC0 TXC";
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skew-delay = <10>;
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};
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conf4 {
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pins = "T10 GMAC1 RXDV";
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skew-delay = <7>;
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};
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conf5 {
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pins = "Y11 GMAC1 RXC";
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skew-delay = <8>;
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};
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conf6 {
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pins = "W11 GMAC1 TXEN";
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skew-delay = <7>;
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};
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conf7 {
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pins = "V11 GMAC1 TXC";
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skew-delay = <5>;
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};
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conf8 {
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/* The data lines all have default skew */
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pins = "W8 GMAC0 RXD0", "V9 GMAC0 RXD1",
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"Y8 GMAC0 RXD2", "U9 GMAC0 RXD3",
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"T7 GMAC0 TXD0", "U6 GMAC0 TXD1",
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"V7 GMAC0 TXD2", "U7 GMAC0 TXD3",
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"Y12 GMAC1 RXD0", "V12 GMAC1 RXD1",
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"T11 GMAC1 RXD2", "W12 GMAC1 RXD3",
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"U10 GMAC1 TXD0", "Y10 GMAC1 TXD1",
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"W10 GMAC1 TXD2", "T9 GMAC1 TXD3";
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skew-delay = <7>;
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};
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/* Set up drive strength on GMAC0 and GMAC1 to 16 mA */
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conf9 {
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groups = "gmii_gmac0_grp", "gmii_gmac1_grp";
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drive-strength = <16>;
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};
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};
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};
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};
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sata: sata@46000000 {
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cortina,gemini-ata-muxmode = <0>;
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cortina,gemini-enable-sata-bridge;
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status = "okay";
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};
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gpio0: gpio@4d000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio0_default_pins>;
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};
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gpio1: gpio@4e000000 {
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pinctrl-names = "default";
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pinctrl-0 = <&gpio1_default_pins>;
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};
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pci@50000000 {
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status = "okay";
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};
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ethernet@60000000 {
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status = "okay";
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ethernet-port@0 {
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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ethernet-port@1 {
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phy-mode = "rgmii";
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fixed-link {
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speed = <1000>;
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full-duplex;
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pause;
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};
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};
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};
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ide@63000000 {
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status = "okay";
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};
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usb@68000000 {
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status = "okay";
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};
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usb@69000000 {
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status = "okay";
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};
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};
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};
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