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v1: Add generic amdgpu_reset_control to handle different types of resets. It may be added at device, hive or ip level. Each reset control has a list of handlers associated with it to handle different types of reset. Reset control is responsible for choosing the right handler given a particular reset context. Handler objects may implement a set of functions on how to handle a particular type of reset. prepare_env = Prepare environment/software context (not used currently). prepare_hwcontext = Prepare hardware context for the reset. perform_reset = Perform the type of reset. restore_hwcontext = Restore the hw context after reset. restore_env = Restore the environment after reset (not used currently). Reset context carries the context of reset, as of now this is based on the parameters used for current set of resets. v2: Fix coding style Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
245 lines
6.0 KiB
Makefile
245 lines
6.0 KiB
Makefile
#
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# Copyright 2017 Advanced Micro Devices, Inc.
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#
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# Permission is hereby granted, free of charge, to any person obtaining a
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# copy of this software and associated documentation files (the "Software"),
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# to deal in the Software without restriction, including without limitation
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# the rights to use, copy, modify, merge, publish, distribute, sublicense,
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# and/or sell copies of the Software, and to permit persons to whom the
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# Software is furnished to do so, subject to the following conditions:
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#
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# The above copyright notice and this permission notice shall be included in
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# all copies or substantial portions of the Software.
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#
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# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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# THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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# OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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# ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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# OTHER DEALINGS IN THE SOFTWARE.
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#
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#
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# Makefile for the drm device driver. This driver provides support for the
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# Direct Rendering Infrastructure (DRI) in XFree86 4.1.0 and higher.
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FULL_AMD_PATH=$(srctree)/$(src)/..
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DISPLAY_FOLDER_NAME=display
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FULL_AMD_DISPLAY_PATH = $(FULL_AMD_PATH)/$(DISPLAY_FOLDER_NAME)
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ccflags-y := -I$(FULL_AMD_PATH)/include/asic_reg \
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-I$(FULL_AMD_PATH)/include \
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-I$(FULL_AMD_PATH)/amdgpu \
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-I$(FULL_AMD_PATH)/pm/inc \
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-I$(FULL_AMD_PATH)/acp/include \
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-I$(FULL_AMD_DISPLAY_PATH) \
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-I$(FULL_AMD_DISPLAY_PATH)/include \
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-I$(FULL_AMD_DISPLAY_PATH)/dc \
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-I$(FULL_AMD_DISPLAY_PATH)/amdgpu_dm \
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-I$(FULL_AMD_PATH)/amdkfd
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amdgpu-y := amdgpu_drv.o
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# add KMS driver
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amdgpu-y += amdgpu_device.o amdgpu_kms.o \
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amdgpu_atombios.o atombios_crtc.o amdgpu_connectors.o \
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atom.o amdgpu_fence.o amdgpu_ttm.o amdgpu_object.o amdgpu_gart.o \
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amdgpu_encoders.o amdgpu_display.o amdgpu_i2c.o \
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amdgpu_fb.o amdgpu_gem.o amdgpu_ring.o \
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amdgpu_cs.o amdgpu_bios.o amdgpu_benchmark.o amdgpu_test.o \
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atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \
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atombios_encoders.o amdgpu_sa.o atombios_i2c.o \
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amdgpu_dma_buf.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \
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amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \
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amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \
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amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \
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amdgpu_gmc.o amdgpu_mmhub.o amdgpu_xgmi.o amdgpu_csa.o amdgpu_ras.o amdgpu_vm_cpu.o \
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amdgpu_vm_sdma.o amdgpu_discovery.o amdgpu_ras_eeprom.o amdgpu_nbio.o \
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amdgpu_umc.o smu_v11_0_i2c.o amdgpu_fru_eeprom.o amdgpu_rap.o \
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amdgpu_fw_attestation.o amdgpu_securedisplay.o
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amdgpu-$(CONFIG_PERF_EVENTS) += amdgpu_pmu.o
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# add asic specific block
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amdgpu-$(CONFIG_DRM_AMDGPU_CIK)+= cik.o cik_ih.o \
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dce_v8_0.o gfx_v7_0.o cik_sdma.o uvd_v4_2.o vce_v2_0.o
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amdgpu-$(CONFIG_DRM_AMDGPU_SI)+= si.o gmc_v6_0.o gfx_v6_0.o si_ih.o si_dma.o dce_v6_0.o \
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uvd_v3_1.o
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amdgpu-y += \
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vi.o mxgpu_vi.o nbio_v6_1.o soc15.o emu_soc.o mxgpu_ai.o nbio_v7_0.o vega10_reg_init.o \
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vega20_reg_init.o nbio_v7_4.o nbio_v2_3.o nv.o navi10_reg_init.o navi14_reg_init.o \
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arct_reg_init.o navi12_reg_init.o mxgpu_nv.o sienna_cichlid_reg_init.o vangogh_reg_init.o \
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nbio_v7_2.o dimgrey_cavefish_reg_init.o hdp_v4_0.o hdp_v5_0.o aldebaran_reg_init.o
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# add DF block
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amdgpu-y += \
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df_v1_7.o \
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df_v3_6.o
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# add GMC block
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amdgpu-y += \
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gmc_v7_0.o \
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gmc_v8_0.o \
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gfxhub_v1_0.o mmhub_v1_0.o gmc_v9_0.o gfxhub_v1_1.o mmhub_v9_4.o \
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gfxhub_v2_0.o mmhub_v2_0.o gmc_v10_0.o gfxhub_v2_1.o mmhub_v2_3.o \
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mmhub_v1_7.o
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# add UMC block
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amdgpu-y += \
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umc_v6_1.o umc_v6_0.o umc_v8_7.o
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# add IH block
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amdgpu-y += \
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amdgpu_irq.o \
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amdgpu_ih.o \
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iceland_ih.o \
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tonga_ih.o \
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cz_ih.o \
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vega10_ih.o \
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vega20_ih.o \
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navi10_ih.o
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# add PSP block
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amdgpu-y += \
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amdgpu_psp.o \
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psp_v3_1.o \
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psp_v10_0.o \
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psp_v11_0.o \
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psp_v12_0.o \
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psp_v13_0.o
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# add DCE block
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amdgpu-y += \
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dce_v10_0.o \
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dce_v11_0.o \
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dce_virtual.o
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# add GFX block
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amdgpu-y += \
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amdgpu_gfx.o \
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amdgpu_rlc.o \
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gfx_v8_0.o \
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gfx_v9_0.o \
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gfx_v9_4.o \
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gfx_v9_4_2.o \
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gfx_v10_0.o
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# add async DMA block
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amdgpu-y += \
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amdgpu_sdma.o \
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sdma_v2_4.o \
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sdma_v3_0.o \
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sdma_v4_0.o \
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sdma_v4_4.o \
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sdma_v5_0.o \
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sdma_v5_2.o
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# add MES block
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amdgpu-y += \
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mes_v10_1.o
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# add UVD block
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amdgpu-y += \
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amdgpu_uvd.o \
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uvd_v5_0.o \
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uvd_v6_0.o \
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uvd_v7_0.o
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# add VCE block
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amdgpu-y += \
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amdgpu_vce.o \
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vce_v3_0.o \
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vce_v4_0.o
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# add VCN and JPEG block
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amdgpu-y += \
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amdgpu_vcn.o \
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vcn_v1_0.o \
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vcn_v2_0.o \
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vcn_v2_5.o \
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vcn_v3_0.o \
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amdgpu_jpeg.o \
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jpeg_v1_0.o \
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jpeg_v2_0.o \
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jpeg_v2_5.o \
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jpeg_v3_0.o
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# add ATHUB block
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amdgpu-y += \
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athub_v1_0.o \
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athub_v2_0.o \
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athub_v2_1.o
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# add SMUIO block
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amdgpu-y += \
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smuio_v9_0.o \
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smuio_v11_0.o \
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smuio_v11_0_6.o \
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smuio_v13_0.o
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# add reset block
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amdgpu-y += \
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amdgpu_reset.o
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# add amdkfd interfaces
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amdgpu-y += amdgpu_amdkfd.o
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ifneq ($(CONFIG_HSA_AMD),)
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AMDKFD_PATH := ../amdkfd
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include $(FULL_AMD_PATH)/amdkfd/Makefile
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amdgpu-y += $(AMDKFD_FILES)
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amdgpu-y += \
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amdgpu_amdkfd_fence.o \
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amdgpu_amdkfd_gpuvm.o \
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amdgpu_amdkfd_gfx_v8.o \
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amdgpu_amdkfd_gfx_v9.o \
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amdgpu_amdkfd_arcturus.o \
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amdgpu_amdkfd_aldebaran.o \
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amdgpu_amdkfd_gfx_v10.o \
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amdgpu_amdkfd_gfx_v10_3.o
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ifneq ($(CONFIG_DRM_AMDGPU_CIK),)
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amdgpu-y += amdgpu_amdkfd_gfx_v7.o
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endif
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endif
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# add cgs
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amdgpu-y += amdgpu_cgs.o
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# GPU scheduler
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amdgpu-y += amdgpu_job.o
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# ACP componet
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ifneq ($(CONFIG_DRM_AMD_ACP),)
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amdgpu-y += amdgpu_acp.o
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AMDACPPATH := ../acp
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include $(FULL_AMD_PATH)/acp/Makefile
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amdgpu-y += $(AMD_ACP_FILES)
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endif
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amdgpu-$(CONFIG_COMPAT) += amdgpu_ioc32.o
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amdgpu-$(CONFIG_VGA_SWITCHEROO) += amdgpu_atpx_handler.o
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amdgpu-$(CONFIG_ACPI) += amdgpu_acpi.o
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amdgpu-$(CONFIG_HMM_MIRROR) += amdgpu_mn.o
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include $(FULL_AMD_PATH)/pm/Makefile
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amdgpu-y += $(AMD_POWERPLAY_FILES)
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ifneq ($(CONFIG_DRM_AMD_DC),)
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RELATIVE_AMD_DISPLAY_PATH = ../$(DISPLAY_FOLDER_NAME)
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include $(FULL_AMD_DISPLAY_PATH)/Makefile
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amdgpu-y += $(AMD_DISPLAY_FILES)
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endif
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obj-$(CONFIG_DRM_AMDGPU)+= amdgpu.o
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