Evan Quan 995da6cc4c drm/amdgpu: update psp firmwares loading sequence V2 ... For those ASICs with DF Cstate management centralized to PMFW, TMR setup should be performed between pmfw loading and other non-psp firmwares loading. V2: skip possible SMU firmware reloading Signed-off-by: Evan Quan <evan.quan@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-02-26 14:17:32 -05:00
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acp	drm/amdgpu: fix license on Kconfig and Makefiles	2019-12-11 15:22:08 -05:00
amdgpu	drm/amdgpu: update psp firmwares loading sequence V2	2020-02-26 14:17:32 -05:00
amdkfd	drm/amdkfd: refactor runtime pm for baco	2020-02-12 16:00:54 -05:00
display	drm/amd/display: limit display clock to 100MHz to avoid FIFO error	2020-02-25 11:10:08 -05:00
include	amdgpu/gmc_v9: save/restore sdpif regs during S3	2020-02-25 11:01:26 -05:00
powerplay	drm/amdgpu: fix memory leak during TDR test(v2)	2020-02-25 11:01:25 -05:00