mirror_ubuntu-kernels/arch/arm/boot/dts/orion5x-netgear-wnr854t.dts
Andrew Lunn e2e1bcb19b ARM: dts: orion5: Add missing phy-mode and fixed links
The DSA framework has got more picky about always having a phy-mode
for the CPU port. The Orion5x Ethernet is an RGMII port. Set the
switch to impose the RGMII delays.

Additionally, the cpu label has never actually been used in the
binding, so remove it.

Lastly, add a fixed-link node indicating the expected speed/duplex of
the link to the SoC.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-07 17:28:24 +02:00

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// SPDX-License-Identifier: GPL-2.0-only
// Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "orion5x-mv88f5181.dtsi"
/ {
model = "Netgear WNR854-t";
compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
"marvell,orion5x";
aliases {
serial0 = &uart0;
};
memory {
device_type = "memory";
reg = <0x00000000 0x2000000>; /* 32 MB */
};
chosen {
stdout-path = "serial0:115200n8";
};
soc {
ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
<MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
<MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_reset_button>;
pinctrl-names = "default";
reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
};
};
gpio-leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
pinctrl-names = "default";
led@0 {
label = "wnr854t:green:power";
gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
};
led@1 {
label = "wnr854t:blink:power";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
};
led@2 {
label = "wnr854t:green:wan";
gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
};
};
};
&devbus_bootcs {
status = "okay";
devbus,keep-config;
flash@0 {
compatible = "cfi-flash";
reg = <0 0x800000>;
bank-width = <2>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x0 0x100000>;
};
partition@100000 {
label = "rootfs";
reg = <0x100000 0x660000>;
};
partition@760000 {
label = "uboot_env";
reg = <0x760000 0x20000>;
};
partition@780000 {
label = "uboot";
reg = <0x780000 0x80000>;
read-only;
};
};
};
};
&mdio {
status = "okay";
switch: switch@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsa,member = <0 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan3";
phy-handle = <&lan3phy>;
};
port@1 {
reg = <1>;
label = "lan4";
phy-handle = <&lan4phy>;
};
port@2 {
reg = <2>;
label = "wan";
phy-handle = <&wanphy>;
};
port@3 {
reg = <3>;
ethernet = <&ethport>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
port@5 {
reg = <5>;
label = "lan1";
phy-handle = <&lan1phy>;
};
port@7 {
reg = <7>;
label = "lan2";
phy-handle = <&lan2phy>;
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
lan3phy: ethernet-phy@0 {
/* Marvell 88E1121R (port 1) */
compatible = "ethernet-phy-id0141.0cb0",
"ethernet-phy-ieee802.3-c22";
reg = <0>;
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
};
lan4phy: ethernet-phy@1 {
/* Marvell 88E1121R (port 2) */
compatible = "ethernet-phy-id0141.0cb0",
"ethernet-phy-ieee802.3-c22";
reg = <1>;
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
};
wanphy: ethernet-phy@2 {
/* Marvell 88E1121R (port 1) */
compatible = "ethernet-phy-id0141.0cb0",
"ethernet-phy-ieee802.3-c22";
reg = <2>;
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
};
lan1phy: ethernet-phy@5 {
/* Marvell 88E1112 */
compatible = "ethernet-phy-id0141.0cb0",
"ethernet-phy-ieee802.3-c22";
reg = <5>;
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
};
lan2phy: ethernet-phy@7 {
/* Marvell 88E1112 */
compatible = "ethernet-phy-id0141.0cb0",
"ethernet-phy-ieee802.3-c22";
reg = <7>;
marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
};
};
};
};
&eth {
status = "okay";
ethernet-port@0 {
/* Hardwired to DSA switch */
speed = <1000>;
duplex = <1>;
phy-mode = "rgmii";
};
};
&pinctrl {
pinctrl-0 = <&pmx_pci_gpios>;
pinctrl-names = "default";
pmx_power_led: pmx-power-led {
marvell,pins = "mpp0";
marvell,function = "gpio";
};
pmx_reset_button: pmx-reset-button {
marvell,pins = "mpp1";
marvell,function = "gpio";
};
pmx_power_led_blink: pmx-power-led-blink {
marvell,pins = "mpp2";
marvell,function = "gpio";
};
pmx_wan_led: pmx-wan-led {
marvell,pins = "mpp3";
marvell,function = "gpio";
};
pmx_pci_gpios: pmx-pci-gpios {
marvell,pins = "mpp4";
marvell,function = "gpio";
};
};
&uart0 {
/* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
status = "okay";
};