mirror of
https://git.proxmox.com/git/mirror_ubuntu-kernels.git
synced 2026-01-06 03:53:44 +00:00
Most of the changes fall into one of three categories: adding support
for additional devices on existing machines, cleaning up issues found
by the ongoing conversion to machine-readable bindings, and addressing
minor mistakes in the existing DT data.
Across SoC vendors, Qualcomm and Freescale stick out as getting the most
updates, which corresponds to their dominance in the mobile phone and
embedded industrial markets, respectively.
There are 636 non-merge changeset in this branch, which is a little
lower than most times, but more importantly we only add 36 machine
files, which is about half of what we had the past few releases.
Eight new SoCs are added, but all of them are variations of already
supported SoC families, and most of them come with one reference board
design from the SoC vendor:
- Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
cores.
- TI AM62A is another member of the K3 family with Cortex-A53 cores,
this one is targetted at Video/Vision processing for industrial
and automotive applications.
- NXP i.MX8DXL is another chip for this market in the ever-growing
i.MX8 family, this one again with two Cortex-A35 cores.
- Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
minor updates of R8A77951 and R8A77980, respectively.
- Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
IPQ8064 chip, with minimally different features.
The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
this time, but in the end did not make the cut.
The new machines based on existing SoC support are fairly uneventful:
- Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
Snapdragon 8 Gen 1.
- Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
Grand Max. These are added for both 32-bit and 64-bit kernels,
as they originally shipped running 32-bit code.
- Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere
Mt. Mitchell
- Three new machines based on Rockchips RK3399 and RK3566:
Anberic RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
- Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
- Two development boards in the Microchip AT91 family:
SAMA5D3-EDS and lan966x-pcb8290.
- Minor variants of existing boards using Amlogic, Broadcom, Marvell,
Rockchips, Freescale Layerscape and Socionext Uniphier SoCs.
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cL7m17nk88sYOzTtSCjfnCPX8KSB7JmElsoWme3PzYhnildEmeBYfiqyqRsGP8KI
pLOec8GXfwDcnaLvBYT6EO/pAO1lZgp531spVacv4brJtQGFRbm4VuvzyFqE2b7g
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Merge tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"Most of the changes fall into one of three categories: adding support
for additional devices on existing machines, cleaning up issues found
by the ongoing conversion to machine-readable bindings, and addressing
minor mistakes in the existing DT data.
Across SoC vendors, Qualcomm and Freescale stick out as getting the
most updates, which corresponds to their dominance in the mobile phone
and embedded industrial markets, respectively.
There are 636 non-merge changeset in this branch, which is a little
lower than most times, but more importantly we only add 36 machine
files, which is about half of what we had the past few releases.
Eight new SoCs are added, but all of them are variations of already
supported SoC families, and most of them come with one reference board
design from the SoC vendor:
- Mediatek MT8186 is a Chromebook/Tablet type SoC, similar to the
MT65xx series of phone SoCs, with two Cortex-A76 and six Cortex-A55
cores.
- TI AM62A is another member of the K3 family with Cortex-A53 cores,
this one is targetted at Video/Vision processing for industrial and
automotive applications.
- NXP i.MX8DXL is another chip for this market in the ever-growing
i.MX8 family, this one again with two Cortex-A35 cores.
- Renesas R-Car H3Ne-1.7G (R8A779MB) and R-Car V3H2 (R8A77980A) are
minor updates of R8A77951 and R8A77980, respectively.
- Qualcomm IPQ8064-v2.0, IPQ8062 and IPQ8065 are all variants of the
IPQ8064 chip, with minimally different features.
The AMD Pensando Elba and Apple M1 Ultra SoC support was getting close
this time, but in the end did not make the cut.
The new machines based on existing SoC support are fairly uneventful:
- Sony Xperia 1 IV is a fairly recent phone based on Qualcomm
Snapdragon 8 Gen 1.
- Three Samsung phones based on Snapdragon 410: Galaxy E5, E7 and
Grand Max. These are added for both 32-bit and 64-bit kernels, as
they originally shipped running 32-bit code.
- Two new servers using AST2600 BMCs: AMD DaytonaX and Ampere Mt.
Mitchell
- Three new machines based on Rockchips RK3399 and RK3566: Anberic
RG353P and RG503, Pine64 Pinephone Pro, Open AI Lab
- Multiple NXP i.MX6/i.MX8 based boards: Kontron SL/BL i.MX8MM OSM-S,
i.MX8MM Gateworks GW7904, MSC SM2S-IMX8PLUS SoM and carrier board
- Two development boards in the Microchip AT91 family: SAMA5D3-EDS
and lan966x-pcb8290.
- Minor variants of existing boards using Amlogic, Broadcom, Marvell,
Rockchips, Freescale Layerscape and Socionext Uniphier SoCs"
* tag 'arm-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (617 commits)
Revert "ARM: dts: BCM5301X: Add basic PCI controller properties"
ARM: dts: s5pv210: correct double "pins" in pinmux node
ARM: dts: exynos: fix polarity of VBUS GPIO of Origen
arm64: dts: exynos: fix polarity of "enable" line of NFC chip in TM2
arm64: dts: uniphier: Add L2 cache node
arm64: dts: uniphier: Remove compatible "snps,dw-pcie" from pcie node
arm64: dts: uniphier: Fix opp-table node name for LD20
arm64: dts: uniphier: Add USB-device support for PXs3 reference board
arm64: dts: uniphier: Add ahci controller nodes for PXs3
arm64: dts: uniphier: Use GIC interrupt definitions
arm64: dts: uniphier: Rename gpio-hog nodes
arm64: dts: uniphier: Rename usb-glue node for USB3 to usb-controller
arm64: dts: uniphier: Rename usb-phy node for USB2 to usb-controller
arm64: dts: uniphier: Rename pvtctl node to thermal-sensor
ARM: dts: uniphier: Remove compatible "snps,dw-pcie-ep" from pcie-ep node
ARM: dts: uniphier: Move interrupt-parent property to each child node in uniphier-support-card
ARM: dts: uniphier: Add ahci controller nodes for PXs2
ARM: dts: uniphier: Add ahci controller nodes for Pro4
ARM: dts: uniphier: Use GIC interrupt definitions
ARM: dts: uniphier: Rename gpio-hog node
...
698 lines
14 KiB
Plaintext
698 lines
14 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (c) 2014 Protonic Holland
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* Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
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*/
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#include <dt-bindings/display/sdtv-standards.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/media/tvp5150.h>
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#include <dt-bindings/sound/fsl-imx-audmux.h>
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/ {
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chosen {
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stdout-path = &uart4;
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};
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backlight_lcd: backlight {
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compatible = "pwm-backlight";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_backlight>;
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pwms = <&pwm1 0 5000000 0>;
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brightness-levels = <0 16 64 255>;
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num-interpolated-steps = <16>;
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default-brightness-level = <48>;
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power-supply = <®_3v3>;
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enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>;
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};
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backlight_led: backlight-led {
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compatible = "pwm-backlight";
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pwms = <&pwm3 0 5000000 0>;
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brightness-levels = <0 16 64 255>;
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num-interpolated-steps = <16>;
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default-brightness-level = <48>;
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power-supply = <®_3v3>;
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};
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/* only for backwards compatibility with old HW */
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backlight_isb: backlight-isb {
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compatible = "pwm-backlight";
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pwms = <&pwm2 0 5000000 0>;
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brightness-levels = <0 8 48 255>;
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num-interpolated-steps = <5>;
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default-brightness-level = <0>;
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power-supply = <®_3v3>;
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};
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connector {
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compatible = "composite-video-connector";
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label = "Composite0";
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sdtv-standards = <SDTV_STD_PAL_B>;
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port {
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comp0_out: endpoint {
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remote-endpoint = <&tvp5150_comp0_in>;
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};
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};
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};
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counter-0 {
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compatible = "interrupt-counter";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_counter0>;
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gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
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};
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counter-1 {
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compatible = "interrupt-counter";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_counter1>;
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gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
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};
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counter-2 {
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compatible = "interrupt-counter";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_counter2>;
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gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_leds>;
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led-0 {
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label = "debug0";
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function = LED_FUNCTION_HEARTBEAT;
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gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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led-1 {
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label = "debug1";
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function = LED_FUNCTION_DISK;
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gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "disk-activity";
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};
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led-2 {
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label = "power_led";
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function = LED_FUNCTION_POWER;
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gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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led-3 {
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label = "isb_led";
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function = LED_FUNCTION_POWER;
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gpios = <&gpio4 31 GPIO_ACTIVE_HIGH>;
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default-state = "on";
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};
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};
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reg_1v8: regulator-1v8 {
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compatible = "regulator-fixed";
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regulator-name = "1v8";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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};
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reg_3v3: regulator-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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};
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reg_otg_vbus: regulator-otg-vbus {
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compatible = "regulator-fixed";
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regulator-name = "otg-vbus";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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};
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sound {
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compatible = "simple-audio-card";
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simple-audio-card,name = "prti6q-sgtl5000";
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simple-audio-card,format = "i2s";
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simple-audio-card,widgets =
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"Microphone", "Microphone Jack",
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"Line", "Line In Jack",
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"Headphone", "Headphone Jack",
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"Speaker", "External Speaker";
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simple-audio-card,routing =
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"MIC_IN", "Microphone Jack",
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"LINE_IN", "Line In Jack",
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"Headphone Jack", "HP_OUT",
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"External Speaker", "LINE_OUT";
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simple-audio-card,cpu {
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sound-dai = <&ssi1>;
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system-clock-frequency = <0>; /* Do NOT call fsl_ssi_set_dai_sysclk! */
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};
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simple-audio-card,codec {
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sound-dai = <&codec>;
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bitclock-master;
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frame-master;
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};
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};
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thermal-zones {
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chassis-thermal {
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polling-delay = <20000>;
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polling-delay-passive = <0>;
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thermal-sensors = <&tsens0>;
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};
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};
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};
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&audmux {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_audmux>;
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status = "okay";
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mux-ssi1 {
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fsl,audmux-port = <0>;
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fsl,port-config = <
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IMX_AUDMUX_V2_PTCR_SYN 0
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IMX_AUDMUX_V2_PTCR_TFSEL(2) 0
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IMX_AUDMUX_V2_PTCR_TCSEL(2) 0
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IMX_AUDMUX_V2_PTCR_TFSDIR 0
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IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2)
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>;
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};
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mux-pins3 {
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fsl,audmux-port = <2>;
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fsl,port-config = <
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IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0)
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0 IMX_AUDMUX_V2_PDCR_TXRXEN
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>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can1>;
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termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
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termination-ohms = <150>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can2>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>;
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assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>;
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};
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&ecspi1 {
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cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi1>;
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <20000000>;
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};
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};
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&gpio2 {
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gpio-line-names =
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"YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "",
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"", "LED_PWM", "", "", "",
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"", "", "",
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"", "", "", "", "", "ISB_IN2", "ISB_nIN1", "ON_SWITCH",
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"POWER_LED", "", "", "", "", "", "", "";
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};
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&gpio3 {
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gpio-line-names =
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1",
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"CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ",
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"TSS_TXD", "TSS_RXD", "", "", "", "", "YACO_BOOT0",
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"YACO_RESET";
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};
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&gpio7 {
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gpio-line-names =
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"EMMC_DAT5", "EMMC_DAT4", "EMMC_CMD", "EMMC_CLK", "EMMC_DAT0",
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"EMMC_DAT1", "EMMC_DAT2", "EMMC_DAT3",
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"EMMC_RST", "", "", "", "CAM_DETECT", "", "", "",
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"", "EMMC_DAT7", "EMMC_DAT6", "", "", "", "", "",
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"", "", "", "", "", "", "", "";
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};
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&i2c1 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c1>;
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status = "okay";
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codec: audio-codec@a {
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compatible = "fsl,sgtl5000";
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reg = <0xa>;
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#sound-dai-cells = <0>;
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clocks = <&clks 201>;
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VDDA-supply = <®_3v3>;
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VDDIO-supply = <®_3v3>;
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VDDD-supply = <®_1v8>;
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};
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video-decoder@5c {
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compatible = "ti,tvp5150";
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reg = <0x5c>;
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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tvp5150_comp0_in: endpoint {
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remote-endpoint = <&comp0_out>;
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};
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};
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/* Output port 2 is video output pad */
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port@2 {
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reg = <2>;
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tvp5151_to_ipu1_csi0_mux: endpoint {
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remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
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};
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};
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};
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};
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&i2c3 {
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clock-frequency = <100000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c3>;
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status = "okay";
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adc@49 {
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compatible = "ti,ads1015";
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reg = <0x49>;
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#address-cells = <1>;
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#size-cells = <0>;
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channel@4 {
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reg = <4>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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channel@5 {
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reg = <5>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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channel@6 {
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reg = <6>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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channel@7 {
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reg = <7>;
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ti,gain = <3>;
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ti,datarate = <3>;
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};
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};
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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tsens0: temperature-sensor@70 {
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compatible = "ti,tmp103";
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reg = <0x70>;
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#thermal-sensor-cells = <0>;
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};
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};
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&ipu1_csi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ipu1_csi0>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ipu1_csi0_mux_from_parallel_sensor {
|
|
remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>;
|
|
};
|
|
|
|
&ldb {
|
|
status = "okay";
|
|
|
|
lvds-channel@0 {
|
|
status = "okay";
|
|
|
|
port@4 {
|
|
reg = <4>;
|
|
|
|
lvds0_out: endpoint {
|
|
remote-endpoint = <&panel_in>;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&pwm1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm2 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm2>;
|
|
status = "okay";
|
|
};
|
|
|
|
&pwm3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_pwm3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&ssi1 {
|
|
#sound-dai-cells = <0>;
|
|
fsl,mode = "ac97-slave";
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart1>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart3>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart4 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart4>;
|
|
status = "okay";
|
|
};
|
|
|
|
&uart5 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_uart5>;
|
|
status = "okay";
|
|
};
|
|
|
|
&usbh1 {
|
|
pinctrl-names = "default";
|
|
phy_type = "utmi";
|
|
dr_mode = "host";
|
|
status = "okay";
|
|
};
|
|
|
|
&usbotg {
|
|
vbus-supply = <®_otg_vbus>;
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usbotg>;
|
|
phy_type = "utmi";
|
|
dr_mode = "host";
|
|
disable-over-current;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc1 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc1>;
|
|
cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
|
|
no-1-8-v;
|
|
disable-wp;
|
|
cap-sd-highspeed;
|
|
no-mmc;
|
|
no-sdio;
|
|
status = "okay";
|
|
};
|
|
|
|
&usdhc3 {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_usdhc3>;
|
|
bus-width = <8>;
|
|
no-1-8-v;
|
|
non-removable;
|
|
no-sd;
|
|
no-sdio;
|
|
status = "okay";
|
|
};
|
|
|
|
&iomuxc {
|
|
pinctrl-names = "default";
|
|
pinctrl-0 = <&pinctrl_hog>;
|
|
|
|
pinctrl_audmux: audmuxgrp {
|
|
fsl,pins = <
|
|
/* SGTL5000 sys_mclk */
|
|
MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0
|
|
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
|
|
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
|
|
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_backlight: backlightgrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_can1: can1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000
|
|
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008
|
|
/* CAN1_SR */
|
|
MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008
|
|
/* CAN1_TERM */
|
|
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088
|
|
>;
|
|
};
|
|
|
|
pinctrl_can2: can2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000
|
|
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008
|
|
/* CAN2_SR */
|
|
MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13008
|
|
>;
|
|
};
|
|
|
|
pinctrl_counter0: counter0grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b000
|
|
>;
|
|
};
|
|
|
|
pinctrl_counter1: counter1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b000
|
|
>;
|
|
};
|
|
|
|
pinctrl_counter2: counter2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b000
|
|
>;
|
|
};
|
|
|
|
pinctrl_ecspi1: ecspi1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
|
|
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
|
|
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
|
|
/* CS */
|
|
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_hog: hoggrp {
|
|
fsl,pins = <
|
|
/* ITU656_nRESET */
|
|
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0
|
|
/* CAM1_MIRROR */
|
|
MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x130b0
|
|
/* CAM2_MIRROR */
|
|
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0
|
|
/* CAM_nDETECT */
|
|
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
|
|
/* ISB_IN1 */
|
|
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0
|
|
/* ISB_nIN2 */
|
|
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0
|
|
/* WARN_LIGHT */
|
|
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x100b0
|
|
/* ON2_FB */
|
|
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0
|
|
/* YACO_nIRQ */
|
|
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0
|
|
/* YACO_BOOT0 */
|
|
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x130b0
|
|
/* YACO_nRESET */
|
|
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0
|
|
/* FORCE_ON1 */
|
|
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
|
|
/* AUDIO_nRESET */
|
|
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0
|
|
/* ITU656_nPDN */
|
|
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0
|
|
|
|
/* New in HW revision 1 */
|
|
/* ON1_FB */
|
|
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x100b0
|
|
/* DIP1_FB */
|
|
MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c1: i2c1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1
|
|
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_i2c3: i2c3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
|
|
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_ipu1_csi0: ipu1csi0grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0
|
|
MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0
|
|
MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_leds: ledsgrp {
|
|
fsl,pins = <
|
|
/* DEBUG0 */
|
|
MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b0
|
|
/* DEBUG1 */
|
|
MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x1b0b0
|
|
/* POWER_LED */
|
|
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b0
|
|
/* ISB_LED */
|
|
MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm1: pwm1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm2: pwm2grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_pwm3: pwm3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
/* YaCO AUX Uart */
|
|
pinctrl_uart1: uart1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
/* YaCO Touchscreen UART */
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart4: uart4grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart5: uart5grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
|
|
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usbotg: usbotggrp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0
|
|
/* power enable, high active */
|
|
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9
|
|
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
|
|
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
|
|
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
|
|
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
|
|
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
|
|
MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc3: usdhc3grp {
|
|
fsl,pins = <
|
|
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099
|
|
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099
|
|
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099
|
|
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099
|
|
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099
|
|
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099
|
|
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099
|
|
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099
|
|
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099
|
|
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099
|
|
MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1
|
|
>;
|
|
};
|
|
};
|