Sinan Kaya 8e7341750b dmaengine: qcom_hidma: correct channel QOS register offset ... A regression was found while testing QOS with different channels. The QOS register offset is 0x700 rather than 0x300. Signed-off-by: Sinan Kaya <okaya@codeaurora.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com>		2017-07-19 09:38:55 +05:30
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bam_dma.c	dmaengine: qcom-bam-dma: add __maybe_unused annotations for PM	2016-07-06 22:39:43 +05:30
hidma_dbg.c	dmaengine: qcom_hidma: make pending_tre_count atomic	2016-11-03 18:55:44 +05:30
hidma_ll.c	dmaengine: qcom_hidma: introduce memset support	2017-07-19 09:33:21 +05:30
hidma_mgmt_sys.c
hidma_mgmt.c	dmaengine: qcom_hidma: correct channel QOS register offset	2017-07-19 09:38:55 +05:30
hidma_mgmt.h
hidma.c	dmaengine: qcom_hidma: introduce memset support	2017-07-19 09:33:21 +05:30
hidma.h	dmaengine: qcom_hidma: introduce memset support	2017-07-19 09:33:21 +05:30
Kconfig	dmaengine: add Qualcomm Technologies HIDMA channel driver	2016-03-11 07:42:30 +05:30
Makefile	dmaengine: qcom_hidma: add debugfs hooks	2016-05-14 11:54:45 +05:30