Nikola Cornij 8cc426d79b drm/amd/display: Program DSC during timing programming ... [why] Link or DIG BE can't be exposed to a higher stream bandwidth than they can handle. When DSC is required to fit the stream into the link bandwidth, DSC has to be programmed during timing programming to ensure this. Without it, intermittent issues such as black screen after S3 or a hot-plug can be seen. [how] Move DSC programming from enabling stream on link to timing setup. Signed-off-by: Nikola Cornij <nikola.cornij@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-03-09 13:49:34 -04:00
..
amdgpu_dm	drm/amd/display: determine is mst hdcp based on stream instead of sink signal	2020-03-09 13:49:06 -04:00
dc	drm/amd/display: Program DSC during timing programming	2020-03-09 13:49:34 -04:00
dmub	drm/amd/display: Add ABM command structs to DMCUB	2020-03-05 00:31:31 -05:00
include	drm/amd/display: Fix default logger mask definition	2020-03-05 00:31:38 -05:00
modules	drm/amd/display: determine is mst hdcp based on stream instead of sink signal	2020-03-09 13:49:06 -04:00
Kconfig	amdgpu: Enable initial DCN support on POWER	2019-12-18 16:09:05 -05:00
Makefile	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards	2019-11-13 15:29:42 -05:00
TODO	drm/amd/display: Convert remaining loggers off dc_logger	2018-07-13 14:48:42 -05:00