Thomas Petazzoni 88aa3bbfc0 mtd: rawnand: marvell: use regmap_update_bits() for syscon access ... The marvell_nfc_init() function fiddles with some bits of a system controller on Armada 7K/8K. However, it does a read/modify/write sequence on GENCONF_CLK_GATING_CTRL and GENCONF_ND_CLK_CTRL, which isn't safe from a concurrency point of view, as the regmap lock isn't taken accross the read/modify/write sequence. To solve this issue, use regmap_update_bits(). While at it, since the "reg" variable is no longer needed for the read/modify/write sequences, get rid of it for the regmap_write() to GENCONF_SOC_DEVICE_MUX, and directly pass the value to be written as argument. Fixes: 02f26ecf8c ("mtd: nand: add reworked Marvell NAND controller driver") Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>		2018-09-04 23:36:55 +02:00
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onenand	mtd: onenand: use mtd_device_register() where applicable	2018-07-19 23:14:12 +02:00
raw	mtd: rawnand: marvell: use regmap_update_bits() for syscon access	2018-09-04 23:36:55 +02:00
spi	mtd: spinand: macronix: Add support for MX35LF2GE4AB	2018-07-18 09:24:12 +02:00
bbt.c	mtd: nand: Add core infrastructure to deal with NAND devices	2018-02-16 10:10:53 +01:00
core.c	mtd: nand: Fix nanddev_mtd_erase()	2018-04-22 19:59:29 +02:00
Kconfig	mtd: nand: Add core infrastructure to support SPI NANDs	2018-07-18 09:24:10 +02:00
Makefile	mtd: nand: Add core infrastructure to support SPI NANDs	2018-07-18 09:24:10 +02:00