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0bbca347f5
Use the correct compatible 'nxp,se97b' as it is an SE97BTP chip. While at it, fix the node name according to device tree spec recommendations. The EEPROM is a separate node anyway. Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
570 lines
13 KiB
Plaintext
570 lines
13 KiB
Plaintext
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
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/*
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* Copyright 2018-2022 TQ-Systems GmbH
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* Author: Markus Niebel <Markus.Niebel@tq-group.com>
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*/
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/ {
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model = "TQ-Systems MBA6ULx Baseboard";
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aliases {
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mmc0 = &usdhc2;
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mmc1 = &usdhc1;
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rtc0 = &rtc0;
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rtc1 = &snvs_rtc;
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};
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chosen {
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stdout-path = &uart1;
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};
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backlight: backlight {
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compatible = "pwm-backlight";
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power-supply = <®_mba6ul_3v3>;
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enable-gpios = <&expander_out0 4 GPIO_ACTIVE_HIGH>;
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status = "disabled";
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};
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beeper: beeper {
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compatible = "gpio-beeper";
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gpios = <&expander_out1 6 GPIO_ACTIVE_HIGH>;
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};
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gpio_buttons: gpio-keys {
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compatible = "gpio-keys";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_buttons>;
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button1 {
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label = "s14";
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linux,code = <KEY_1>;
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gpios = <&expander_in0 0 GPIO_ACTIVE_LOW>;
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};
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button2 {
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label = "s6";
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linux,code = <KEY_2>;
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gpios = <&expander_in0 1 GPIO_ACTIVE_LOW>;
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};
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button3 {
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label = "s7";
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linux,code = <KEY_3>;
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gpios = <&expander_in0 2 GPIO_ACTIVE_LOW>;
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};
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power-button {
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label = "POWER";
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linux,code = <KEY_POWER>;
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gpios = <&gpio1 3 GPIO_ACTIVE_LOW>;
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gpio-key,wakeup;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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status = "okay";
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led1 {
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label = "led1";
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gpios = <&expander_out1 4 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "default-on";
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};
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led2 {
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label = "led2";
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gpios = <&expander_out1 5 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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};
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};
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reg_lcd_pwr: regulator-lcd-pwr {
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compatible = "regulator-fixed";
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regulator-name = "lcd-pwr";
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gpio = <&expander_out0 1 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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status = "disabled";
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};
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reg_mba6ul_3v3: regulator-mba6ul-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "supply-mba6ul-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-always-on;
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};
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reg_mba6ul_5v0: regulator-mba6ul-5v0 {
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compatible = "regulator-fixed";
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regulator-name = "supply-mba6ul-5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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};
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reg_mpcie: regulator-mpcie-3v3 {
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compatible = "regulator-fixed";
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regulator-name = "mpcie-3v3";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&expander_out0 2 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-always-on;
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startup-delay-us = <500000>;
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vin-supply = <®_mba6ul_3v3>;
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};
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reg_otg2vbus_5v0: regulator-otg2-vbus-5v0 {
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compatible = "regulator-fixed";
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gpio = <&expander_out1 0 GPIO_ACTIVE_HIGH>;
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enable-active-high;
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regulator-name = "otg2-vbus-supply-5v0";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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vin-supply = <®_mpcie>;
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};
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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linux,cma {
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compatible = "shared-dma-pool";
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reusable;
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size = <0x6000000>;
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linux,cma-default;
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};
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};
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sound {
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compatible = "fsl,imx-audio-tlv320aic32x4";
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model = "imx-audio-tlv320aic32x4";
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ssi-controller = <&sai1>;
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audio-codec = <&tlv320aic32x4>;
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audio-asrc = <&asrc>;
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};
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};
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&can1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan1>;
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xceiver-supply = <®_mba6ul_3v3>;
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status = "okay";
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};
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&can2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_flexcan2>;
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xceiver-supply = <®_mba6ul_3v3>;
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status = "okay";
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};
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&clks {
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assigned-clocks = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
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assigned-clock-rates = <768000000>;
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};
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&ecspi2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_ecspi2>;
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num-cs = <1>;
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status = "okay";
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};
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&fec1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet1>;
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phy-mode = "rmii";
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phy-handle = <ðphy0>;
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phy-supply = <®_mba6ul_3v3>;
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phy-reset-gpios = <&expander_out1 1 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <25>;
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phy-reset-post-delay = <1>;
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status = "okay";
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};
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&fec2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet2>, <&pinctrl_enet2_mdc>;
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phy-mode = "rmii";
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phy-handle = <ðphy1>;
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phy-supply = <®_mba6ul_3v3>;
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phy-reset-gpios = <&expander_out1 2 GPIO_ACTIVE_LOW>;
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phy-reset-duration = <25>;
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phy-reset-post-delay = <1>;
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status = "okay";
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mdio {
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#address-cells = <1>;
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#size-cells = <0>;
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ethphy0: ethernet-phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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clocks = <&clks IMX6UL_CLK_ENET_REF>;
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reg = <0>;
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max-speed = <100>;
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};
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ethphy1: ethernet-phy@1 {
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compatible = "ethernet-phy-ieee802.3-c22";
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clocks = <&clks IMX6UL_CLK_ENET2_REF_125M>;
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reg = <1>;
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max-speed = <100>;
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};
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};
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};
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&i2c4 {
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tlv320aic32x4: audio-codec@18 {
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compatible = "ti,tlv320aic32x4";
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reg = <0x18>;
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clocks = <&clks IMX6UL_CLK_SAI1>;
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clock-names = "mclk";
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ldoin-supply = <®_mba6ul_3v3>;
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iov-supply = <®_mba6ul_3v3>;
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};
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jc42: temperature-sensor@19 {
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compatible = "nxp,se97b", "jedec,jc-42.4-temp";
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reg = <0x19>;
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};
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expander_out0: gpio-expander@20 {
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compatible = "nxp,pca9554";
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reg = <0x20>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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expander_in0: gpio-expander@21 {
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compatible = "nxp,pca9554";
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reg = <0x21>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_expander_in0>;
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interrupt-parent = <&gpio4>;
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interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
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interrupt-controller;
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#interrupt-cells = <2>;
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gpio-controller;
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#gpio-cells = <2>;
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enet1_int-hog {
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gpio-hog;
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gpios = <6 0>;
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input;
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};
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enet2_int-hog {
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gpio-hog;
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gpios = <7 0>;
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input;
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};
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};
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expander_out1: gpio-expander@22 {
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compatible = "nxp,pca9554";
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reg = <0x22>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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analog_touch: touchscreen@41 {
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compatible = "st,stmpe811";
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reg = <0x41>;
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interrupts = <21 IRQ_TYPE_EDGE_FALLING>;
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interrupt-parent = <&gpio4>;
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interrupt-controller;
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status = "disabled";
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stmpe_touchscreen {
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compatible = "st,stmpe-ts";
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st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */
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st,ave-ctrl = <3>; /* 8 sample average control */
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st,fraction-z = <7>; /* 7 length fractional part in z */
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/*
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* 50 mA typical 80 mA max touchscreen drivers
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* current limit value
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*/
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st,i-drive = <1>;
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st,mod-12b = <1>; /* 12-bit ADC */
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st,ref-sel = <0>; /* internal ADC reference */
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st,sample-time = <4>; /* ADC converstion time: 80 clocks */
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st,settling = <3>; /* 1 ms panel driver settling time */
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st,touch-det-delay = <5>; /* 5 ms touch detect interrupt delay */
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};
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};
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/* NXP SE97BTP with temperature sensor + eeprom */
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se97b: eeprom@51 {
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compatible = "nxp,se97b", "atmel,24c02";
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reg = <0x51>;
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pagesize = <16>;
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};
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};
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&pwm2 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_pwm2>;
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status = "okay";
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};
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&sai1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sai1>;
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assigned-clocks = <&clks IMX6UL_CLK_SAI1_SEL>,
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<&clks IMX6UL_CLK_SAI1>;
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assigned-clock-parents = <&clks IMX6UL_CLK_PLL4_AUDIO_DIV>;
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assigned-clock-rates = <0>, <24000000>;
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fsl,sai-mclk-direction-output;
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status = "okay";
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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status = "okay";
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};
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&uart3 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart3>;
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status = "okay";
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};
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&uart6 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart6>;
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/* for DTE mode, add below change */
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/* fsl,dte-mode; */
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/* pinctrl-0 = <&pinctrl_uart6dte>; */
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uart-has-rtscts;
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linux,rs485-enabled-at-boot-time;
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rs485-rts-active-low;
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rs485-rx-during-tx;
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status = "okay";
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};
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/* otg-port */
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&usbotg1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb_otg1>;
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power-active-high;
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over-current-active-low;
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/* we implement only dual role but not a fully featured OTG */
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hnp-disable;
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srp-disable;
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adp-disable;
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dr_mode = "otg";
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status = "okay";
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};
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/* 7-port usb hub */
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/* id, pwr, oc pins not connected */
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&usbotg2 {
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disable-over-current;
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vbus-supply = <®_otg2vbus_5v0>;
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dr_mode = "host";
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status = "okay";
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};
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usdhc1>;
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cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
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wp-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
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bus-width = <4>;
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vmmc-supply = <®_mba6ul_3v3>;
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vqmmc-supply = <®_vccsd>;
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no-1-8-v;
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no-mmc;
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no-sdio;
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status = "okay";
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};
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&wdog1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_wdog1>;
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fsl,ext-reset-output;
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status = "okay";
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};
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&iomuxc {
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pinctrl_buttons: buttonsgrp {
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fsl,pins = <
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MX6UL_PAD_GPIO1_IO03__GPIO1_IO03 0x100b0
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>;
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};
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pinctrl_ecspi2: ecspi2grp {
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fsl,pins = <
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MX6UL_PAD_UART4_TX_DATA__ECSPI2_SCLK 0x1b020
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MX6UL_PAD_UART5_RX_DATA__ECSPI2_MISO 0x1b020
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MX6UL_PAD_UART5_TX_DATA__ECSPI2_MOSI 0x1b020
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MX6UL_PAD_UART4_RX_DATA__ECSPI2_SS0 0x1b020
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>;
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};
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pinctrl_enet1: enet1grp {
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fsl,pins = <
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MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0
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MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0
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MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0
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MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0
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MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0
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MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0
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MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0
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MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b0a8
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>;
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};
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pinctrl_enet2: enet2grp {
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fsl,pins = <
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MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0
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MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0
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MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0
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MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0a0
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MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0a0
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MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0
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MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b0a8
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>;
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};
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pinctrl_enet2_mdc: enet2mdcgrp {
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fsl,pins = <
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/* mdio */
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MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0
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MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0
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>;
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};
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pinctrl_expander_in0: expanderin0grp {
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fsl,pins = <
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MX6UL_PAD_CSI_DATA02__GPIO4_IO23 0x1b0b1
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>;
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};
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pinctrl_flexcan1: flexcan1grp {
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fsl,pins = <
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MX6UL_PAD_UART3_RTS_B__FLEXCAN1_RX 0x1b020
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MX6UL_PAD_UART3_CTS_B__FLEXCAN1_TX 0x1b020
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>;
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};
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pinctrl_flexcan2: flexcan2grp {
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fsl,pins = <
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MX6UL_PAD_UART2_RTS_B__FLEXCAN2_RX 0x1b020
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MX6UL_PAD_UART2_CTS_B__FLEXCAN2_TX 0x1b020
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>;
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};
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pinctrl_pwm2: pwm2grp {
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fsl,pins = <
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/* 100 k PD, DSE 120 OHM, SPPEED LO */
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MX6UL_PAD_GPIO1_IO09__PWM2_OUT 0x00003050
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>;
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};
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pinctrl_sai1: sai1grp {
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fsl,pins = <
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MX6UL_PAD_CSI_DATA05__SAI1_TX_BCLK 0x1b0b1
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MX6UL_PAD_CSI_DATA04__SAI1_TX_SYNC 0x1b0b1
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MX6UL_PAD_CSI_DATA07__SAI1_TX_DATA 0x1f0b8
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MX6UL_PAD_CSI_DATA06__SAI1_RX_DATA 0x110b0
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MX6UL_PAD_CSI_DATA01__SAI1_MCLK 0x1b0b1
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1
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MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart3: uart3grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1
|
|
MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart6: uart6grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_CSI_MCLK__UART6_DCE_TX 0x1b0b1
|
|
MX6UL_PAD_CSI_PIXCLK__UART6_DCE_RX 0x1b0b1
|
|
MX6UL_PAD_CSI_VSYNC__UART6_DCE_RTS 0x1b0b1
|
|
MX6UL_PAD_CSI_HSYNC__UART6_DCE_CTS 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_uart6dte: uart6dte {
|
|
fsl,pins = <
|
|
MX6UL_PAD_CSI_PIXCLK__UART6_DTE_TX 0x1b0b1
|
|
MX6UL_PAD_CSI_MCLK__UART6_DTE_RX 0x1b0b1
|
|
MX6UL_PAD_CSI_HSYNC__UART6_DTE_RTS 0x1b0b1
|
|
MX6UL_PAD_CSI_VSYNC__UART6_DTE_CTS 0x1b0b1
|
|
>;
|
|
};
|
|
|
|
pinctrl_usb_otg1: usbotg1grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x00017059
|
|
MX6UL_PAD_GPIO1_IO01__USB_OTG1_OC 0x0001b0b0
|
|
MX6UL_PAD_GPIO1_IO04__USB_OTG1_PWR 0x0001b099
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1: usdhc1grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
|
|
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x00017059
|
|
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x00017059
|
|
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x00017059
|
|
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x00017059
|
|
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x00017059
|
|
/* WP */
|
|
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0001b099
|
|
/* CD */
|
|
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_100mhz: usdhc1grp100mhz {
|
|
fsl,pins = <
|
|
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
|
|
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170b9
|
|
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x000170b9
|
|
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x000170b9
|
|
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x000170b9
|
|
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x000170b9
|
|
/* WP */
|
|
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0001b099
|
|
/* CD */
|
|
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
|
|
>;
|
|
};
|
|
|
|
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
|
|
fsl,pins = <
|
|
MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x00017069
|
|
MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x000170f9
|
|
MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x000170f9
|
|
MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x000170f9
|
|
MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x000170f9
|
|
MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x000170f9
|
|
/* WP */
|
|
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x0001b099
|
|
/* CD */
|
|
MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x0001b099
|
|
>;
|
|
};
|
|
|
|
pinctrl_wdog1: wdog1grp {
|
|
fsl,pins = <
|
|
MX6UL_PAD_GPIO1_IO08__WDOG1_WDOG_B 0x0001b099
|
|
>;
|
|
};
|
|
};
|