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82d8936914
The AMD maximum frequency ratio setting function depends on CPPC, so the x86 CPPC implementation file is better space for this function. Signed-off-by: Huang Rui <ray.huang@amd.com> [ rjw: Subject adjustment ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
90 lines
1.9 KiB
C
90 lines
1.9 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* cppc.c: CPPC Interface for x86
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* Copyright (c) 2016, Intel Corporation.
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*/
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#include <acpi/cppc_acpi.h>
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#include <asm/msr.h>
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#include <asm/processor.h>
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#include <asm/topology.h>
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/* Refer to drivers/acpi/cppc_acpi.c for the description of functions */
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bool cpc_ffh_supported(void)
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{
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return true;
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}
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int cpc_read_ffh(int cpunum, struct cpc_reg *reg, u64 *val)
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{
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int err;
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err = rdmsrl_safe_on_cpu(cpunum, reg->address, val);
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if (!err) {
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u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
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reg->bit_offset);
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*val &= mask;
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*val >>= reg->bit_offset;
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}
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return err;
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}
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int cpc_write_ffh(int cpunum, struct cpc_reg *reg, u64 val)
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{
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u64 rd_val;
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int err;
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err = rdmsrl_safe_on_cpu(cpunum, reg->address, &rd_val);
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if (!err) {
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u64 mask = GENMASK_ULL(reg->bit_offset + reg->bit_width - 1,
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reg->bit_offset);
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val <<= reg->bit_offset;
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val &= mask;
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rd_val &= ~mask;
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rd_val |= val;
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err = wrmsrl_safe_on_cpu(cpunum, reg->address, rd_val);
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}
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return err;
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}
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bool amd_set_max_freq_ratio(u64 *ratio)
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{
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struct cppc_perf_caps perf_caps;
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u64 highest_perf, nominal_perf;
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u64 perf_ratio;
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int rc;
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if (!ratio)
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return false;
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rc = cppc_get_perf_caps(0, &perf_caps);
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if (rc) {
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pr_debug("Could not retrieve perf counters (%d)\n", rc);
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return false;
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}
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highest_perf = amd_get_highest_perf();
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nominal_perf = perf_caps.nominal_perf;
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if (!highest_perf || !nominal_perf) {
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pr_debug("Could not retrieve highest or nominal performance\n");
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return false;
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}
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perf_ratio = div_u64(highest_perf * SCHED_CAPACITY_SCALE, nominal_perf);
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/* midpoint between max_boost and max_P */
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perf_ratio = (perf_ratio + SCHED_CAPACITY_SCALE) >> 1;
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if (!perf_ratio) {
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pr_debug("Non-zero highest/nominal perf values led to a 0 ratio\n");
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return false;
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}
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*ratio = perf_ratio;
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arch_set_max_freq_ratio(false);
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return true;
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}
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