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f44a90104e
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Simon Horman <simon.horman@corigine.com> Reviewed-by: Vladimir Oltean <olteanv@gmail.com> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Link: https://lore.kernel.org/r/20230724211859.805481-1-robh@kernel.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
387 lines
8.7 KiB
C
387 lines
8.7 KiB
C
/*
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* B53 register access through memory mapped registers
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*
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* Copyright (C) 2012-2013 Jonas Gorski <jogo@openwrt.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*/
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#include <linux/bits.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/platform_data/b53.h>
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#include "b53_priv.h"
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struct b53_mmap_priv {
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void __iomem *regs;
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};
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static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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*val = readb(regs + (page << 8) + reg);
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return 0;
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}
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static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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if (WARN_ON(reg % 2))
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return -EINVAL;
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if (dev->pdata && dev->pdata->big_endian)
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*val = ioread16be(regs + (page << 8) + reg);
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else
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*val = readw(regs + (page << 8) + reg);
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return 0;
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}
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static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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if (WARN_ON(reg % 4))
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return -EINVAL;
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if (dev->pdata && dev->pdata->big_endian)
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*val = ioread32be(regs + (page << 8) + reg);
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else
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*val = readl(regs + (page << 8) + reg);
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return 0;
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}
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static int b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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if (WARN_ON(reg % 2))
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return -EINVAL;
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if (reg % 4) {
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u16 lo;
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u32 hi;
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if (dev->pdata && dev->pdata->big_endian) {
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lo = ioread16be(regs + (page << 8) + reg);
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hi = ioread32be(regs + (page << 8) + reg + 2);
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} else {
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lo = readw(regs + (page << 8) + reg);
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hi = readl(regs + (page << 8) + reg + 2);
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}
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*val = ((u64)hi << 16) | lo;
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} else {
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u32 lo;
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u16 hi;
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if (dev->pdata && dev->pdata->big_endian) {
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lo = ioread32be(regs + (page << 8) + reg);
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hi = ioread16be(regs + (page << 8) + reg + 4);
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} else {
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lo = readl(regs + (page << 8) + reg);
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hi = readw(regs + (page << 8) + reg + 4);
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}
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*val = ((u64)hi << 32) | lo;
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}
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return 0;
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}
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static int b53_mmap_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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u32 hi, lo;
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if (WARN_ON(reg % 4))
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return -EINVAL;
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if (dev->pdata && dev->pdata->big_endian) {
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lo = ioread32be(regs + (page << 8) + reg);
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hi = ioread32be(regs + (page << 8) + reg + 4);
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} else {
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lo = readl(regs + (page << 8) + reg);
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hi = readl(regs + (page << 8) + reg + 4);
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}
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*val = ((u64)hi << 32) | lo;
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return 0;
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}
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static int b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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writeb(value, regs + (page << 8) + reg);
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return 0;
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}
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static int b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg,
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u16 value)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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if (WARN_ON(reg % 2))
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return -EINVAL;
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if (dev->pdata && dev->pdata->big_endian)
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iowrite16be(value, regs + (page << 8) + reg);
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else
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writew(value, regs + (page << 8) + reg);
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return 0;
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}
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static int b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg,
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u32 value)
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{
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struct b53_mmap_priv *priv = dev->priv;
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void __iomem *regs = priv->regs;
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if (WARN_ON(reg % 4))
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return -EINVAL;
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if (dev->pdata && dev->pdata->big_endian)
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iowrite32be(value, regs + (page << 8) + reg);
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else
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writel(value, regs + (page << 8) + reg);
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return 0;
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}
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static int b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg,
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u64 value)
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{
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if (WARN_ON(reg % 2))
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return -EINVAL;
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if (reg % 4) {
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u32 hi = (u32)(value >> 16);
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u16 lo = (u16)value;
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b53_mmap_write16(dev, page, reg, lo);
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b53_mmap_write32(dev, page, reg + 2, hi);
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} else {
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u16 hi = (u16)(value >> 32);
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u32 lo = (u32)value;
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b53_mmap_write32(dev, page, reg, lo);
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b53_mmap_write16(dev, page, reg + 4, hi);
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}
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return 0;
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}
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static int b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg,
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u64 value)
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{
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u32 hi, lo;
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hi = upper_32_bits(value);
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lo = lower_32_bits(value);
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if (WARN_ON(reg % 4))
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return -EINVAL;
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b53_mmap_write32(dev, page, reg, lo);
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b53_mmap_write32(dev, page, reg + 4, hi);
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return 0;
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}
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static int b53_mmap_phy_read16(struct b53_device *dev, int addr, int reg,
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u16 *value)
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{
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return -EIO;
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}
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static int b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg,
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u16 value)
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{
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return -EIO;
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}
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static const struct b53_io_ops b53_mmap_ops = {
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.read8 = b53_mmap_read8,
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.read16 = b53_mmap_read16,
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.read32 = b53_mmap_read32,
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.read48 = b53_mmap_read48,
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.read64 = b53_mmap_read64,
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.write8 = b53_mmap_write8,
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.write16 = b53_mmap_write16,
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.write32 = b53_mmap_write32,
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.write48 = b53_mmap_write48,
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.write64 = b53_mmap_write64,
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.phy_read16 = b53_mmap_phy_read16,
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.phy_write16 = b53_mmap_phy_write16,
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};
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static int b53_mmap_probe_of(struct platform_device *pdev,
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struct b53_platform_data **ppdata)
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{
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struct device_node *np = pdev->dev.of_node;
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struct device_node *of_ports, *of_port;
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struct device *dev = &pdev->dev;
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struct b53_platform_data *pdata;
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void __iomem *mem;
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mem = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(mem))
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return PTR_ERR(mem);
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pdata = devm_kzalloc(dev, sizeof(struct b53_platform_data),
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GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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pdata->regs = mem;
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pdata->chip_id = (u32)(unsigned long)device_get_match_data(dev);
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pdata->big_endian = of_property_read_bool(np, "big-endian");
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of_ports = of_get_child_by_name(np, "ports");
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if (!of_ports) {
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dev_err(dev, "no ports child node found\n");
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return -EINVAL;
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}
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for_each_available_child_of_node(of_ports, of_port) {
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u32 reg;
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if (of_property_read_u32(of_port, "reg", ®))
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continue;
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if (reg < B53_N_PORTS)
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pdata->enabled_ports |= BIT(reg);
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}
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of_node_put(of_ports);
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*ppdata = pdata;
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return 0;
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}
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static int b53_mmap_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct b53_platform_data *pdata = pdev->dev.platform_data;
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struct b53_mmap_priv *priv;
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struct b53_device *dev;
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int ret;
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if (!pdata && np) {
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ret = b53_mmap_probe_of(pdev, &pdata);
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if (ret) {
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dev_err(&pdev->dev, "OF probe error\n");
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return ret;
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}
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}
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if (!pdata)
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return -EINVAL;
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priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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priv->regs = pdata->regs;
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dev = b53_switch_alloc(&pdev->dev, &b53_mmap_ops, priv);
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if (!dev)
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return -ENOMEM;
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dev->pdata = pdata;
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platform_set_drvdata(pdev, dev);
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return b53_switch_register(dev);
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}
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static int b53_mmap_remove(struct platform_device *pdev)
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{
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struct b53_device *dev = platform_get_drvdata(pdev);
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if (dev)
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b53_switch_remove(dev);
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return 0;
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}
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static void b53_mmap_shutdown(struct platform_device *pdev)
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{
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struct b53_device *dev = platform_get_drvdata(pdev);
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if (dev)
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b53_switch_shutdown(dev);
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platform_set_drvdata(pdev, NULL);
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}
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static const struct of_device_id b53_mmap_of_table[] = {
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{
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.compatible = "brcm,bcm3384-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6318-switch",
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.data = (void *)BCM63268_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6328-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6362-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm6368-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm63268-switch",
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.data = (void *)BCM63268_DEVICE_ID,
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}, {
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.compatible = "brcm,bcm63xx-switch",
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.data = (void *)BCM63XX_DEVICE_ID,
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}, { /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, b53_mmap_of_table);
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static struct platform_driver b53_mmap_driver = {
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.probe = b53_mmap_probe,
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.remove = b53_mmap_remove,
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.shutdown = b53_mmap_shutdown,
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.driver = {
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.name = "b53-switch",
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.of_match_table = b53_mmap_of_table,
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},
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};
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module_platform_driver(b53_mmap_driver);
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MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
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MODULE_DESCRIPTION("B53 MMAP access driver");
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MODULE_LICENSE("Dual BSD/GPL");
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