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Add manual sclk/vddc setting supoort via pp_od_clk_voltage sysfs to maintain consistency with other asics. As cyan skillfish doesn't support DPM, there is only a single frequency and voltage to adjust. v2: maintain consistency and add command guide. v3: adjust user settings storage and coding style. Command guide: echo vc point sclk vddc > pp_od_clk_voltage "vc" - sclk voltage curve "point" - must be 0 "sclk" - target value of sclk(MHz), should be in safe range "vddc" - target value of vddc(mV), a 6.25(mV) stepping is recommended and should be in safe range (the real vddc is an approximation of target value) echo c > pp_od_clk_voltage "c" - commit the changes of sclk and vddc, only after the commit command, the target values set by "vc" command will take effect echo r > pp_od_clk_voltage "r" - reset sclk and vddc to default value, a subsequent commit command is needed to take effect Example: 1) Check default sclk and vddc $ cat pp_od_clk_voltage OD_SCLK: 0: 1800Mhz * OD_VDDC: 0: 862mV * OD_RANGE: SCLK: 1000Mhz 2000Mhz VDDC: 700mV 1129mV 2) Set sclk to 1500MHz and vddc to 700mV $ echo vc 0 1500 700 > pp_od_clk_voltage $ echo c > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 1500Mhz * OD_VDDC: 0: 693mV * OD_RANGE: SCLK: 1000Mhz 2000Mhz VDDC: 700mV 1129mV 3) Reset sclk and vddc to default $ echo r > pp_od_clk_voltage $ echo c > pp_od_clk_voltage $ cat pp_od_clk_voltage OD_SCLK: 0: 1800Mhz * OD_VDDC: 0: 874mV * OD_RANGE: SCLK: 1000Mhz 2000Mhz VDDC: 700mV 1129mV NOTE: We don't specify an explicit safe range, you can set any values between min and max at your own risk. Enjoy! Signed-off-by: Lang Yu <lang.yu@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| vega12 | ||
| aldebaran_ppsmc.h | ||
| amd_powerplay.h | ||
| amdgpu_dpm.h | ||
| amdgpu_pm.h | ||
| amdgpu_smu.h | ||
| arcturus_ppsmc.h | ||
| cz_ppsmc.h | ||
| fiji_ppsmc.h | ||
| hardwaremanager.h | ||
| hwmgr.h | ||
| polaris10_pwrvirus.h | ||
| power_state.h | ||
| pp_debug.h | ||
| pp_endian.h | ||
| pp_thermal.h | ||
| ppinterrupt.h | ||
| rv_ppsmc.h | ||
| smu7_common.h | ||
| smu7_discrete.h | ||
| smu7_fusion.h | ||
| smu7_ppsmc.h | ||
| smu7.h | ||
| smu8_fusion.h | ||
| smu8.h | ||
| smu9_driver_if.h | ||
| smu9.h | ||
| smu10_driver_if.h | ||
| smu10.h | ||
| smu11_driver_if_arcturus.h | ||
| smu11_driver_if_cyan_skillfish.h | ||
| smu11_driver_if_navi10.h | ||
| smu11_driver_if_sienna_cichlid.h | ||
| smu11_driver_if_vangogh.h | ||
| smu11_driver_if.h | ||
| smu12_driver_if.h | ||
| smu13_driver_if_aldebaran.h | ||
| smu13_driver_if_yellow_carp.h | ||
| smu71_discrete.h | ||
| smu71.h | ||
| smu72_discrete.h | ||
| smu72.h | ||
| smu73_discrete.h | ||
| smu73.h | ||
| smu74_discrete.h | ||
| smu74.h | ||
| smu75_discrete.h | ||
| smu75.h | ||
| smu_11_0_cdr_table.h | ||
| smu_types.h | ||
| smu_ucode_xfer_cz.h | ||
| smu_ucode_xfer_vi.h | ||
| smu_v11_0_7_ppsmc.h | ||
| smu_v11_0_7_pptable.h | ||
| smu_v11_0_ppsmc.h | ||
| smu_v11_0_pptable.h | ||
| smu_v11_0.h | ||
| smu_v11_5_pmfw.h | ||
| smu_v11_5_ppsmc.h | ||
| smu_v11_8_pmfw.h | ||
| smu_v11_8_ppsmc.h | ||
| smu_v12_0_ppsmc.h | ||
| smu_v12_0.h | ||
| smu_v13_0_1_pmfw.h | ||
| smu_v13_0_1_ppsmc.h | ||
| smu_v13_0_pptable.h | ||
| smu_v13_0.h | ||
| smumgr.h | ||
| tonga_ppsmc.h | ||
| vega10_ppsmc.h | ||
| vega12_ppsmc.h | ||
| vega20_ppsmc.h | ||