mirror of
https://git.proxmox.com/git/mirror_ubuntu-kernels.git
synced 2025-11-16 12:29:42 +00:00
* Use refcount to prevent corruption
* Call external _get and _put in right order
* Fix use-after-free in mtd release
* Explicitly include correct DT includes
* Clean refcounting with MTD_PARTITIONED_MASTER
* mtdblock: make warning messages ratelimited
* dt-bindings: Add SEAMA partition bindings
MTD device driver changes:
* spear_smi: Use helper function devm_clk_get_enabled()
* maps: fix -Wvoid-pointer-to-enum-cast warning
* docg3: Remove unnecessary (void*) conversions
* physmap-core, spear_smi, st_spi_fsm, lpddr2_nvm, lantiq-flash, plat-ram:
- Use devm_platform_get_and_ioremap_resource()
Raw NAND core changes:
* Fix -Wvoid-pointer-to-enum-cast warning
* Export 'nand_exit_status_op()'
* dt-bindings: Fix nand-controller.yaml license
Raw NAND controller driver changes:
* Omap, Omap2, Samsung, Atmel, fsl_upm, lpc32xx_slc, lpc32xx_mlc, STM32_FMC2,
sh_ftlctl, MXC, Sunxi:
- Use devm_platform_get_and_ioremap_resource()
* Orion, vf610_nfc, Sunxi, STM32_FMC2, MTK, mpc5121, lpc32xx_slc, Intel,
FSMC, Arasan:
- Use helper function devm_clk_get_optional_enabled()
* Brcmnand:
- Use devm_platform_ioremap_resource_byname()
- Propagate init error -EPROBE_DEFER up
- Propagate error and simplify ternary operators
- Fix mtd oobsize
- Fix potential out-of-bounds access in oob write
- Fix crash during the panic_write
- Fix potential false time out warning
- Fix ECC level field setting for v7.2 controller
* fsmc: Handle clk prepare error in fsmc_nand_resume()
* Marvell: Add support for AC5 SoC
* Meson:
- Support for 512B ECC step size
- Fix build error
- Use NAND core API to check status
- dt-bindings:
* Make ECC properties dependent
* Support for 512B ECC step size
* Drop unneeded quotes
* Oxnas: Remove driver and bindings
* Qcom:
- Conversion to ->exec_op()
- Removal of the legacy interface
- Two full series of improvements/misc fixes
* Use the BIT() macro
* Use u8 instead of uint8_t
* Fix alignment with open parenthesis
* Fix the spacing
* Fix wrong indentation
* Fix a typo
* Early structure initialization
* Fix address parsing within ->exec_op()
* Remove superfluous initialization of "ret"
* Rename variables in qcom_op_cmd_mapping()
* Handle unsupported opcode in qcom_op_cmd_mapping()
* Fix the opcode check in qcom_check_op()
* Use EOPNOTSUPP instead of ENOTSUPP
* Wrap qcom_nand_exec_op() to 80 columns
* Unmap sg_list and free desc within submic_descs()
* Simplify the call to nand_prog_page_end_op()
* Do not override the error no of submit_descs()
* Sort includes alphabetically
* Clear buf_count and buf_start in raw read
* Add read/read_start ops in exec_op path
* vf610_nfc: Do not check 0 for platform_get_irq()
SPI NAND manufacturer driver changes:
* gigadevice: Add support for GD5F1GQ{4,5}RExxH
* esmt: Add support for F50D2G41KA
* toshiba: Add support for T{C,H}58NYG{0,2}S3HBAI4 and TH58NYG3S0HBAI6
SPI NOR core changes:
* fix assumption on enabling quad mode in
spi_nor_write_16bit_sr_and_check()
* avoid setting SRWD bit in SR if WP# signal not connected as it will
configure the SR permanently as read only. Add "no-wp" dt property.
* clarify the need for spi-nor compatibles in dt-bindings
SPI NOR manufacturer driver changes:
* Spansion:
- Add support for S28HS02GT
- Switch methods to use vreg_offset from SFDP instead of hardcoding
the register value
* Microchip/SST:
- Add support for sst26vf032b flash
* Winbond:
- Correct flags for Winbond w25q128
* NXP spifi:
- Use helper function devm_clk_get_enabled()
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Merge tag 'mtd/for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Miquel Raynal:
"Core MTD changes:
- Use refcount to prevent corruption
- Call external _get and _put in right order
- Fix use-after-free in mtd release
- Explicitly include correct DT includes
- Clean refcounting with MTD_PARTITIONED_MASTER
- mtdblock: make warning messages ratelimited
- dt-bindings: Add SEAMA partition bindings
Device driver changes:
- Use devm helper functions
- Fix questionable cast, remove pointless ones.
- error handling fixes
- add support for new chip versions
- update DT bindings
- misc cleanups - fix typos, whitespace, indentation"
* tag 'mtd/for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (105 commits)
dt-bindings: mtd: amlogic,meson-nand: drop unneeded quotes
mtd: spear_smi: Use helper function devm_clk_get_enabled()
mtd: rawnand: orion: Use helper function devm_clk_get_optional_enabled()
mtd: rawnand: vf610_nfc: Use helper function devm_clk_get_enabled()
mtd: rawnand: sunxi: Use helper function devm_clk_get_enabled()
mtd: rawnand: stm32_fmc2: Use helper function devm_clk_get_enabled()
mtd: rawnand: mtk: Use helper function devm_clk_get_enabled()
mtd: rawnand: mpc5121: Use helper function devm_clk_get_enabled()
mtd: rawnand: lpc32xx_slc: Use helper function devm_clk_get_enabled()
mtd: rawnand: intel: Use helper function devm_clk_get_enabled()
mtd: rawnand: fsmc: Use helper function devm_clk_get_enabled()
mtd: rawnand: arasan: Use helper function devm_clk_get_enabled()
mtd: rawnand: qcom: Add read/read_start ops in exec_op path
mtd: rawnand: qcom: Clear buf_count and buf_start in raw read
mtd: maps: fix -Wvoid-pointer-to-enum-cast warning
mtd: rawnand: fix -Wvoid-pointer-to-enum-cast warning
mtd: rawnand: fsmc: handle clk prepare error in fsmc_nand_resume()
mtd: rawnand: Propagate error and simplify ternary operators for brcmstb_nand_wait_for_completion()
mtd: rawnand: qcom: Sort includes alphabetically
mtd: rawnand: qcom: Do not override the error no of submit_descs()
...
314 lines
11 KiB
C
314 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018 exceet electronics GmbH
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* Copyright (c) 2018 Kontron Electronics GmbH
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*
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* Author: Frieder Schrempf <frieder.schrempf@kontron.de>
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/mtd/spinand.h>
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/* Kioxia is new name of Toshiba memory. */
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#define SPINAND_MFR_TOSHIBA 0x98
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#define TOSH_STATUS_ECC_HAS_BITFLIPS_T (3 << 4)
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static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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static SPINAND_OP_VARIANTS(write_cache_x4_variants,
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_x4_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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/*
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* Backward compatibility for 1st generation Serial NAND devices
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* which don't support Quad Program Load operation.
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*/
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_variants,
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 0)
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return -ERANGE;
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region->offset = mtd->oobsize / 2;
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region->length = mtd->oobsize / 2;
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return 0;
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}
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static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section > 0)
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return -ERANGE;
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/* 2 bytes reserved for BBM */
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region->offset = 2;
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region->length = (mtd->oobsize / 2) - 2;
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return 0;
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}
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static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = {
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.ecc = tx58cxgxsxraix_ooblayout_ecc,
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.free = tx58cxgxsxraix_ooblayout_free,
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};
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static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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struct nand_device *nand = spinand_to_nand(spinand);
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u8 mbf = 0;
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struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, spinand->scratchbuf);
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switch (status & STATUS_ECC_MASK) {
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case STATUS_ECC_NO_BITFLIPS:
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return 0;
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case STATUS_ECC_UNCOR_ERROR:
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return -EBADMSG;
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case STATUS_ECC_HAS_BITFLIPS:
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case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
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/*
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* Let's try to retrieve the real maximum number of bitflips
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* in order to avoid forcing the wear-leveling layer to move
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* data around if it's not necessary.
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*/
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if (spi_mem_exec_op(spinand->spimem, &op))
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return nanddev_get_ecc_conf(nand)->strength;
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mbf = *(spinand->scratchbuf) >> 4;
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if (WARN_ON(mbf > nanddev_get_ecc_conf(nand)->strength || !mbf))
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return nanddev_get_ecc_conf(nand)->strength;
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return mbf;
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct spinand_info toshiba_spinand_table[] = {
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/* 3.3V 1Gb (1st generation) */
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SPINAND_INFO("TC58CVG0S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 2Gb (1st generation) */
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SPINAND_INFO("TC58CVG1S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 4Gb (1st generation) */
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SPINAND_INFO("TC58CVG2S0HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb (1st generation) */
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SPINAND_INFO("TC58CYG0S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 2Gb (1st generation) */
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SPINAND_INFO("TC58CYG1S3HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 4Gb (1st generation) */
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SPINAND_INFO("TC58CYG2S0HRAIG",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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0,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/*
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* 2nd generation serial nand has HOLD_D which is equivalent to
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* QE_BIT.
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*/
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/* 3.3V 1Gb (2nd generation) */
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SPINAND_INFO("TC58CVG0S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 2Gb (2nd generation) */
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SPINAND_INFO("TC58CVG1S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 4Gb (2nd generation) */
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SPINAND_INFO("TC58CVG2S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 3.3V 8Gb (2nd generation) */
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SPINAND_INFO("TH58CVG3S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
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NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb (2nd generation) */
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SPINAND_INFO("TC58CYG0S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 2Gb (2nd generation) */
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SPINAND_INFO("TC58CYG1S3HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB),
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NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 4Gb (2nd generation) */
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SPINAND_INFO("TC58CYG2S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD),
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NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 8Gb (2nd generation) */
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SPINAND_INFO("TH58CYG3S0HRAIJ",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
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NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
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NAND_ECCREQ(8, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_x4_variants,
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&update_cache_x4_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
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tx58cxgxsxraix_ecc_get_status)),
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/* 1.8V 1Gb (1st generation) */
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SPINAND_INFO("TC58NYG0S3HBAI4",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),
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NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
|
|
NAND_ECCREQ(8, 512),
|
|
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
&write_cache_variants,
|
|
&update_cache_variants),
|
|
0,
|
|
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
|
|
tx58cxgxsxraix_ecc_get_status)),
|
|
/* 1.8V 4Gb (1st generation) */
|
|
SPINAND_INFO("TH58NYG2S3HBAI4",
|
|
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xAC),
|
|
NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 1, 2, 1),
|
|
NAND_ECCREQ(8, 512),
|
|
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
&write_cache_x4_variants,
|
|
&update_cache_x4_variants),
|
|
SPINAND_HAS_QE_BIT,
|
|
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
|
|
tx58cxgxsxraix_ecc_get_status)),
|
|
/* 1.8V 8Gb (1st generation) */
|
|
SPINAND_INFO("TH58NYG3S0HBAI6",
|
|
SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA3),
|
|
NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
|
|
NAND_ECCREQ(8, 512),
|
|
SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
|
&write_cache_x4_variants,
|
|
&update_cache_x4_variants),
|
|
SPINAND_HAS_QE_BIT,
|
|
SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
|
|
tx58cxgxsxraix_ecc_get_status)),
|
|
};
|
|
|
|
static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
|
|
};
|
|
|
|
const struct spinand_manufacturer toshiba_spinand_manufacturer = {
|
|
.id = SPINAND_MFR_TOSHIBA,
|
|
.name = "Toshiba",
|
|
.chips = toshiba_spinand_table,
|
|
.nchips = ARRAY_SIZE(toshiba_spinand_table),
|
|
.ops = &toshiba_spinand_manuf_ops,
|
|
};
|