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The LCD controller is composed of Frame Compression Processor (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU). It has DPI/DSI interfaces and supports a maximum resolution of 1080p along with 2 RPFs to support the blending of two picture layers and raster operations (ROPs). The DU module is connected to VSPD. Add RZ/G2L DU support for RZ/G2L alike SoCs. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://lore.kernel.org/r/20240218164840.57662-4-biju.das.jz@bp.renesas.com Signed-off-by: Maxime Ripard <mripard@kernel.org>
9 lines
245 B
Makefile
9 lines
245 B
Makefile
# SPDX-License-Identifier: GPL-2.0
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rzg2l-du-drm-y := rzg2l_du_crtc.o \
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rzg2l_du_drv.o \
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rzg2l_du_encoder.o \
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rzg2l_du_kms.o \
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rzg2l-du-drm-$(CONFIG_VIDEO_RENESAS_VSP1) += rzg2l_du_vsp.o
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obj-$(CONFIG_DRM_RZG2L_DU) += rzg2l-du-drm.o
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