Nicholas Kazlauskas 7e4d2f30df drm/amd/display: Set exit_optimized_pwr_state for DCN31 ... [Why] SMU now respects the PHY refclk disable request from driver. This causes a hang during hotplug when PHY refclk was disabled because it's not being re-enabled and the transmitter control starts on dc_link_detect. [How] We normally would re-enable the clk with exit_optimized_pwr_state but this is only set on DCN21 and DCN301. Set it for dcn31 as well. This fixes DMCUB timeouts in the PHY. Fixes: 64b1d0e8d5 ("drm/amd/display: Add DCN3.1 HWSEQ") Reviewed-by: Eric Yang <Eric.Yang2@amd.com> Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com> Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-12-14 17:53:26 -05:00
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acp
amdgpu	drm/amdgpu: don't override default ECO_BITs setting	2021-12-14 17:50:36 -05:00
amdkfd	drm/amdkfd: process_info lock not needed for svm	2021-12-01 17:09:58 -05:00
display	drm/amd/display: Set exit_optimized_pwr_state for DCN31	2021-12-14 17:53:26 -05:00
include	drm/amd/pm: avoid duplicate powergate/ungate setting	2021-11-17 17:41:20 -05:00
pm	drm/amd/pm: fix reading SMU FW version from amdgpu_firmware_info on YC	2021-12-14 17:52:28 -05:00