Jiansong Chen 7c49ee9ec5 drm/amdgpu: fix GCR_GENERAL_CNTL offset for dimgrey_cavefish ... dimgrey_cavefish has similar gc_10_3 ip with sienna_cichlid, so follow its registers offset setting. Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com> Reviewed-by: Tao Zhou <tao.zhou1@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2021-04-20 21:36:28 -04:00
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acp	drm: amd/acp: fix broken menu structure	2020-03-13 11:52:35 -04:00
amdgpu	drm/amdgpu: fix GCR_GENERAL_CNTL offset for dimgrey_cavefish	2021-04-20 21:36:28 -04:00
amdkfd	drm/amdkfd: add edc error interrupt handle for poison propogate mode	2021-04-20 21:35:13 -04:00
display	amd/display: allow non-linear multi-planar formats	2021-04-15 16:32:45 -04:00
include	drm/amdgpu: only harvest gcea/mmea error status in arcturus	2021-04-20 21:35:45 -04:00
pm	drm/amd/pm: fix error code in smu_set_power_limit()	2021-04-15 16:32:45 -04:00