Dmytro Laktyushkin 6eb3f7da3c drm/amd/display: fix rn soc bb update ... Currently RN SOC bounding box update assumes we will get at least 2 clock states from SMU. This isn't always true and because of special casing on first clock state we end up with low disp, dpp, dsc and phy clocks. This change removes the special casing allowing the first state to acquire correct clocks. Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com> Reviewed-by: Eric Yang <eric.yang2@amd.com> Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com> Acked-by: Tony Cheng <Tony.Cheng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>		2020-04-28 16:43:13 -04:00
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amdgpu_dm	drm/amd/display: Fix green screen issue after suspend	2020-04-24 09:41:32 -04:00
dc	drm/amd/display: fix rn soc bb update	2020-04-28 16:43:13 -04:00
dmub	drm/amd/display: Allocate scratch space for DMUB CW7	2020-03-19 00:03:04 -04:00
include	drm/amd/display: re-order asic declarations	2020-04-03 17:21:06 -04:00
modules	drm/amd/display: LFC not working on 2.0x range monitors (v2)	2020-03-31 12:26:14 -04:00
Kconfig	amdgpu: Enable initial DCN support on POWER	2019-12-18 16:09:05 -05:00
Makefile	drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guards	2019-11-13 15:29:42 -05:00
TODO	drm/amd/display: Convert remaining loggers off dc_logger	2018-07-13 14:48:42 -05:00