Archit Taneja 6e0eb52eba drm/msm/dsi: Parse bus clocks from a list ... DSI bus clocks seem to vary between different DSI host versions, and the SOC to which they belong. Even the enable/disable sequence varies. Provide a list of bus clock names in dsi_cfg. The driver will use this to retrieve the clocks, and enable/disable them. Add bus clock lists for DSI6G, and DSI for MSM8916(this is DSI6G too, but there is no MMSS_CC specific clock since there is no MMSS clock controller on 8916). Signed-off-by: Archit Taneja <architt@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>		2015-12-14 10:40:30 -05:00
..
phy	drm/msm/dsi: Add support for 28nm PHY on 8960	2015-12-14 10:40:06 -05:00
pll	drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY	2015-12-14 10:40:12 -05:00
dsi_cfg.c	drm/msm/dsi: Parse bus clocks from a list	2015-12-14 10:40:30 -05:00
dsi_cfg.h	drm/msm/dsi: Parse bus clocks from a list	2015-12-14 10:40:30 -05:00
dsi_host.c	drm/msm/dsi: Parse bus clocks from a list	2015-12-14 10:40:30 -05:00
dsi_manager.c	drm/msm/dsi: Modify dsi manager bridge ops to work with external bridges	2015-08-15 18:27:26 -04:00
dsi.c	drm/msm/dsi: Allow dsi to connect to an external bridge	2015-08-15 18:27:25 -04:00
dsi.h	drm/msm/dsi: Parse bus clocks from a list	2015-12-14 10:40:30 -05:00
dsi.xml.h	drm/msm: update generated headers	2015-10-22 15:39:44 -04:00
mmss_cc.xml.h	drm/msm: update generated headers	2015-10-22 15:39:44 -04:00
sfpb.xml.h	drm/msm: update generated headers	2015-10-22 15:39:44 -04:00