Ville Syrjälä 5aa2c9ae93 drm/i915: Update TRANS_MSA_MISC for fastsets ... Update the DP MSA MISC bits for fastsets. This is needed when we change between limited and full range RGB output. On HSW+ changing limited_range does not currently result in a full modeset since we have don't have the readout code for it (for DP we could, and probably should, readout from TRANS_MSA_MISC itself, for HDMI we would have to rely on the infoframe). So the PIPE_CONF_CHECK() is only performed for pre-HSW platforms. That means any change in the value will result in a fastset instead. Fortunately there is no prohibition to changing TRANS_MSA_MISC dynamically, so it looks like we can legally do fastsets for this. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190326142556.21176-5-ville.syrjala@linux.intel.com		2019-03-27 15:30:57 +02:00
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drm	drm/i915: Update TRANS_MSA_MISC for fastsets	2019-03-27 15:30:57 +02:00
host1x	gpu: host1x: Continue CDMA execution starting with a next job	2019-02-07 18:34:25 +01:00
ipu-v3	gpu: ipu-v3: prg: add function to get channel configure status	2019-02-22 11:58:45 +01:00
vga	vga-switcheroo: make PCI dependency explicit	2019-01-15 23:16:47 +01:00
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